SNOSB47E May   2011  – August 2016 LMH6521


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Characteristics
      2. 7.3.2 Output Characteristics
      3. 7.3.3 Output Connections
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Digital Control
      2. 7.5.2 Parallel Mode (MOD1 = 1, MOD0 = 1)
      3. 7.5.3 Serial Mode: SPI Compatible Interface (MOD1 = 1, MOD0 = 0)
      4. 7.5.4 Pulse Mode (MOD1 = 0, MOD0 = 1)
      5. 7.5.5 Interface to ADC
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

Common applications for the LMH6521 would be an IF amplifier, RF amplifier, and ADC driver.

Many applications require impedance matching and filtering. The large voltage swing of the LMH6521 makes it ideal for use with a filter.

The LMH6521 is ideal for applications requiring variable gain and very high linearity for frequencies ranging from 1 MHz to 500 MHz. The LMH6521 can support output voltage swing up to 10 VPP.

8.2 Typical Application

The most typical application for the LMH5621 is shown in Figure 38. In this application the LMH6521 is driving an ADC through a band pass filter.

LMH6521 30120101.gif Figure 38. ADC Driver Application

8.2.1 Design Requirements

An ADC driver is required to deliver a full-scale signal to the ADC input pins with harmonic and intermodulation distortion products that meet the system requirements.

In this example we want to meet the following requirements:

  • Amplifier output voltage: 4 VPP
  • SFDR > 80 dB at 300 MHz
  • Noise voltage < 0 nV/rt Hz

8.2.2 Detailed Design Procedure

A voltage between 4.75 V and 5.25 V must be applied to the supply pin labeled 5 V. Each supply pin must be decoupled with a additional capacitance along with some low inductance, surface-mount ceramic capacitor of 0.01 µF as close to the device as possible where space allows.

The outputs of the LMH6521 are low impedance devices that requires connection to ground with 1-µH RF chokes and require AC-coupling capacitors of 0.01 µF. The input pins are self biased to 2.5 V and must be ac-coupled with 0.01-µF capacitors as well. The output RF inductors and AC-coupling capacitors are the main limitations for operating at low frequencies.

Each channel of the LMH6521 consists of a digital step attenuator followed by a low-distortion, 26-dB fixed gain amplifier and a low impedance output stage. The gain is digitally controlled over a 31.5-dB range from 26 dB to −5.5 dB. The LMH6521 has a 200-Ω differential input impedance and a low 20-Ω differential output impedance.

To enable each channel of the LMH6521, the ENA and ENB pins can be left to float, which internally is connected high with a weak pullup resistor. Externally connecting ENA and ENB to ground disables the channels of the LMH6521 and reduce the current consumption to 17.5 mA per channel.

LMH6521 30120124.gif Figure 39. Basic Operating Connection

The LMH6521 meets the SFDR and output voltage swing requirements with no additional design details. However, the noise requires an additional filter as shown in Figure 38. The filter termination reduces the LMH6521 output noise voltage from 33 nV/rt Hz to 16.5 nV/rt Hz. A simple third order filter reduces out of band noise that would alias into the signal path. For filter details, see Interface to ADC.

LMH6521 Filter_Schematic.gif Figure 40. Filter Schematic

For further design assistance, see SP16160CH1RB Reference Design Board User’s Guide (SNAU079).

8.2.3 Application Curve

LMH6521 D001_SNOSB47E.gif Figure 41. Filter Frequency Response