SNOSAX9J April   2007  – April 2016 LMH6552

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: ±5 V
    6. 6.6 Electrical Characteristics: ±2.5 V
    7. 6.7 Typical Characteristics V+ = +5 V, V− = −5 V
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Fully Differential Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 WSON Package
          2. 8.2.1.2.2 Fully Differential Operation
          3. 8.2.1.2.3 Driving Capacitive Loads
            1. 8.2.1.2.3.1 Balanced Cable Driver
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Single-Ended Input to Differential Output Operation
      3. 8.2.3 Single Supply Operation
      4. 8.2.4 Split Supply Operation
      5. 8.2.5 Output Noise Performance and Measurement
      6. 8.2.6 Driving Analog to Digital Converters
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Bypassing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
    5. 10.5 ESD Protection
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
        1. 11.2.1.1 Evaluation Board
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings(1)(3)

MIN MAX UNIT
Supply Voltage 13.2 V
Common Mode Input Voltage ±VS V
Maximum Input Current (pins 1, 2, 7, 8) 30 mA
Maximum Output Current (pins 4, 5)  (2) mA
Maximum Junction Temperature 150 °C
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The maximum output current (IOUT) is determined by device power dissipation limitations. See Power Dissipation for more details.
(3) For soldering specifications see SNOA549

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750
Machine model (MM) ±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
Operating Temperature Range (1) −40 +85 °C
Total Supply Voltage 4.5 12 V
(1) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX)– TA) / θJA. All numbers apply for packages soldered directly onto a PC Board.

6.4 Thermal Information

THERMAL METRIC(1) LMH6552 UNIT
D NGS
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 150 58 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: ±5 V

Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = +5 V, V− = −5 V, AV= 1, VCM = 0 V, RF = RG = 357 Ω, RL = 500 Ω, for single ended in, differential out.(1)
PARAMETER TEST CONDITIONS MIN(4) TYP(3) MAX(4) UNIT
AC PERFORMANCE (DIFFERENTIAL)
SSBW Small Signal −3-dB Bandwidth (4) VOUT = 0.2 VPP, AV = 1, RL = 1 kΩ 1500 MHz
VOUT = 0.2 VPP, AV = 1 1000
VOUT = 0.2 VPP, AV = 2 930
VOUT = 0.2 VPP, AV = 4 810
VOUT = 0.2 VPP, AV = 8 590
LSBW Large Signal −3 dB Bandwidth VOUT = 2 VPP, AV = 1, RL = 1 kΩ 1250 MHz
VOUT = 2 VPP, AV = 1 950
VOUT = 2 VPP, AV = 2 820
VOUT = 2 VPP, AV = 4 740
VOUT = 2 VPP, AV = 8 590
0.1-dB Bandwidth VOUT = 0.2 VPP, AV = 1 450 MHz
Slew Rate 4-V Step, AV = 1 3800 V/μs
Rise, Fall Time, 10%-90% 2-V Step 600 ps
0.1% Settling Time 2-V Step 10 ns
Overdrive Recovery Time VIN = 1.8-V to 0-V Step, AV = 5 V/V 6 ns
DISTORTION AND NOISE RESPONSE
HD2 2nd Harmonic Distortion VOUT = 2 VPP, f = 20 MHz, RL = 800 Ω –92 dBc
VOUT = 2 VPP, f = 70 MHz, RL = 800 Ω –74
HD3 3rd Harmonic Distortion VOUT = 2 VPP, f = 20 MHz, RL = 800 Ω –93 dBc
VOUT = 2 VPP, f = 70 MHz, RL = 800 Ω –84
IMD3 Two-Tone Intermodulation f ≥ 70 MHz, Third-Order Products, VOUT = 2-VPP Composite –87 dBc
Input Noise Voltage f ≥ 1 MHz 1.1 nV/√Hz
Input Noise Current f ≥ 1 MHz 19.5 pA/√Hz
Noise Figure (See Figure 46) 50-Ω System, AV = 9, 10 MHz 10.3 dB
INPUT CHARACTERISTICS
IBI Input Bias Current (6) 60 110 µA
IBoffset Input Bias Current Differential
(3)		 VCM = 0 V, VID = 0 V, IBoffset = (IB− - IB+)/2 2.5 18 µA
CMRR Common Mode Rejection Ratio (3) DC, VCM = 0 V, VID = 0 V 80 dBc
RIN Input Resistance Differential 15 Ω
CIN Input Capacitance Differential 0.5 pF
CMVR Input Common Mode Voltage Range CMRR > 38 dB ±3.5 ±3.8 V
OUTPUT PERFORMANCE
Output Voltage Swing (3) Differential Output 14.8 15.4 VPP
IOUT Linear Output Current (3) VOUT = 0 V ±70 ±80 mA
ISC Short Circuit Current One Output Shorted to Ground VIN = 2 V Single Ended (2) ±141 mA
Output Balance Error ΔVOUT Common Mode / ΔVOUT Differential, ΔVOD = 1 V, f < 1 MHz –60 dB
MISCELLANEOUS PERFORMANCE
ZT Open Loop Transimpedance Differential 108 dBΩ
PSRR Power Supply Rejection Ratio DC, (V+ - |V-|) = ±1 V 80 dB
IS Supply Current (3) RL = ∞ 19 22.5 25
28		 mA
Enable Voltage Threshold 3 V
Disable Voltage Threshold 2.0 V
Enable/Disable time 15 ns
ISD Disable Shutdown Current 500 600 μA
OUTPUT COMMON MODE CONTROL CIRCUIT
Common Mode Small Signal Bandwidth VIN+ = VIN− = 0 400 MHz
Slew Rate VIN+ = VIN− = 0 607 V/μs
VOSCM Input Offset Voltage Common Mode, VID = 0, VCM = 0 1.5 ±16.5 mV
Input Bias Current  (5) –3.2 ±8 µA
Voltage Range ±3.7 ±3.8 V
CMRR Measure VOD, VID = 0 V 80 dB
Input Resistance 200 kΩ
Gain ΔVO,CM / ΔVCM 0.995 1.0 1.012 V/V
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. See Overview for information on temperature de-rating of this device. Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted.
(2) Limit short circuit current in duration to no more than 10 seconds. See Power Dissipation for more details.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values can vary over time and also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(4) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods.
(5) Negative input current implies current flowing out of the device.
(6) IBoffset is referred to a differential output offset voltage by the following relationship: VOD(offset) = IBI*2RF.

6.6 Electrical Characteristics: ±2.5 V

Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = +2.5 V, V− = −2.5 V, AV = 1, VCM = 0 V, RF = RG = 357 Ω, RL = 500 Ω, for single ended in, differential out.(1)
PARAMETER TEST CONDITIONS MIN (4) TYP (3) MAX (4) UNIT
SSBW Small Signal −3-dB Bandwidth (4) VOUT = 0.2 VPP, AV = 1, RL = 1 kΩ 1100 MHz
VOUT = 0.2 VPP, AV = 1 800
VOUT = 0.2 VPP, AV = 2 740
VOUT = 0.2 VPP, AV = 4 660
VOUT = 0.2 VPP, AV = 8 498
LSBW Large Signal −3 dB Bandwidth VOUT = 2 VPP, AV = 1, RL = 1 kΩ 820 MHz
VOUT = 2 VPP, AV = 1 690
VOUT = 2 VPP, AV = 2 620
VOUT = 2 VPP, AV = 4 589
VOUT = 2 VPP, AV = 8 480
0.1 dB Bandwidth VOUT = 0.2 VPP, AV = 1 300 MHz
Slew Rate 2-V Step, AV = 1 2100 V/μs
Rise/Fall Time, 10% to 90% 2-V Step 700 ps
0.1% Settling Time 2-V Step 10 ns
Overdrive Recovery Time VIN = 0.7-V to 0-V Step, AV = 5 V/V 6 ns
DISTORTION AND NOISE RESPONSE
HD2 2nd Harmonic Distortion VOUT = 2 VPP, f = 20 MHz, RL = 800 Ω -82 dBc
VOUT = 2 VPP, f = 70 MHz, RL = 800 Ω -65
HD3 3rd Harmonic Distortion VOUT = 2 VPP, f = 20 MHz, RL = 800 Ω -79 dBc
VOUT = 2 VPP, f = 70 MHz, RL = 800 Ω -67
IMD3 Two-Tone Intermodulation f ≥ 70 MHz, Third-Order Products,
VOUT = 2-VPP Composite 		−77 dBc
Input Noise Voltage f ≥ 1 MHz 1.1 nV/√Hz
Input Noise Current f ≥ 1 MHz 19.5 pA/√Hz
Noise Figure (See Figure 46) 50-Ω System, AV = 9, 10 MHz 10.2 dB
INPUT CHARACTERISTICS
IBI Input Bias Current (6) 54 90 µA
IBoffset Input Bias Current Differential
(3)		 VCM = 0 V, VID = 0 V, IBoffset = (IB− - IB+ )/2 2.3 18 μA
CMRR Common-Mode Rejection Ratio (3) DC, VCM = 0 V, VID = 0 V 75 dBc
RIN Input Resistance Differential 15 Ω
CIN Input Capacitance Differential 0.5 pF
CMVR Input Common Mode Range CMRR > 38 dB ±1.0 ±1.3 V
OUTPUT PERFORMANCE
Output Voltage Swing (3) Differential Output 5.6 6.0 VPP
IOUT Linear Output Current (3) VOUT = 0 V ±55 ±65 mA
ISC Short Circuit Current One Output Shorted to Ground, VIN = 2 V Single Ended (2) ±131 mA
Output Balance Error ΔVOUT Common Mode / ΔVOUT Differential, ΔVOD = 1 V, f < 1 MHz 60 dB
MISCELLANEOUS PERFORMANCE
ZT Open Loop Transimpedance Differential 107 dBΩ
PSRR Power Supply Rejection Ratio DC, ΔVS = ±1 V 80 dB
IS Supply Current (3) RL = ∞ 17 20.4 24
27		 mA
Enable Voltage Threshold 0.5 V
Disable Voltage Threshold –0.5 V
Enable/Disable Time 15 ns
ISD Disable Shutdown Current 500 600 µA
OUTPUT COMMON MODE CONTROL CIRCUIT
Common Mode Small Signal Bandwidth VIN+ = VIN− = 0 310 MHz
Slew Rate VIN+ = VIN− = 0 430 V/μs
VOSCM Input Offset Voltage Common Mode, VID = 0, VCM = 0 1.65 ±15 mV
Input Bias Current  (5) −2.9 µA
Voltage Range ±1.19 ±1.25 V
CMRR Measure VOD, VID = 0 V 80 dB
Input Resistance 200 kΩ
Gain ΔVO,CM / ΔVCM 0.995 1.0 1.012 V/V
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. See Overview for information on temperature de-rating of this device." Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted.
(2) Limit short circuit current in duration to no more than 10 seconds. See Power Dissipation for more details.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values can vary over time and also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(4) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods.
(5) Negative input current implies current flowing out of the device.
(6) IBoffset is referred to a differential output offset voltage by the following relationship: VOD(offset) = IBI*2RF.

6.7 Typical Characteristics V+ = +5 V, V− = −5 V

(TA = 25°C, RF = RG = 357 Ω, RL = 500 Ω, AV = 1, for single ended in, differential out, unless specified).
LMH6552 30003547.gif Figure 1. Frequency Response vs Gain
LMH6552 30003548.gif Figure 3. Frequency Response vs VOUT
LMH6552 30003562.gif Figure 5. Frequency Response vs Supply Voltage
LMH6552 30003559.gif Figure 7. Frequency Response vs Resistive Load
LMH6552 30003561.gif Figure 9. Frequency Response vs RF
LMH6552 30003527.gif Figure 11. 2 VPP Pulse Response Single Ended Input
LMH6552 30003524.gif Figure 13. Output Common Mode Pulse Response
LMH6552 30003543.png Figure 15. Distortion vs Supply Voltage
LMH6552 30003538.gif Figure 17. Distortion vs Output Common Mode Voltage
LMH6552 30003530.gif Figure 19. Maximum VOUT vs IOUT
LMH6552 30003541.gif Figure 21. Open Loop Transimpedance
LMH6552 30003517.gif Figure 23. Closed Loop Output Impedance
LMH6552 30003557.gif Figure 25. Overdrive Recovery
LMH6552 30003519.gif Figure 27. PSRR
LMH6552 30003533.gif Figure 29. CMRR
LMH6552 30003545.gif Figure 31. Noise Figure
LMH6552 30003549.gif Figure 33. Input Noise vs Frequency
LMH6552 30003556.gif Figure 35. Differential S-Parameter Phase vs Frequency
LMH6552 30003552.gif Figure 37. 3rd Order Intermodulation Products vs VOUT
LMH6552 30003534.gif Figure 2. Frequency Response vs Gain
LMH6552 30003516.gif Figure 4. Frequency Response vs VOUT
LMH6552 30003563.gif Figure 6. Frequency Response vs Supply Voltage
LMH6552 30003560.gif Figure 8. Frequency Response vs Resistive Load
LMH6552 30003526.gif Figure 10. 1 VPP Pulse Response Single Ended Input
LMH6552 30003525.gif Figure 12. Large Signal Pulse Response
LMH6552 30003529.gif Figure 14. Distortion vs Frequency Single Ended Input
LMH6552 30003537.gif Figure 16. Distortion vs Supply Voltage
LMH6552 30003567.gif Figure 18. Distortion vs Output Common Mode Voltage
LMH6552 30003531.gif Figure 20. Minimum VOUT vs IOUT
LMH6552 30003542.gif Figure 22. Open Loop Transimpedance
LMH6552 30003518.gif Figure 24. Closed Loop Output Impedance
LMH6552 30003558.gif Figure 26. Overdrive Recovery
LMH6552 30003520.gif Figure 28. PSRR
LMH6552 30003513.gif Figure 30. Balance Error
LMH6552 30003546.gif Figure 32. Noise Figure
LMH6552 30003555.gif Figure 34. Differential S-Parameter Magnitude vs Frequency
LMH6552 30003551.gif Figure 36. 3rd Order Intermodulation Products vs VOUT
LMH6552 30003565.gif Figure 38. 3rd Order Intermodulation Products
vs Center Frequency