SNOSA71L October   2004  – September 2015 LMP2011 , LMP2012

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: LMP2011
    5. 6.5  Thermal Information: LMP2012
    6. 6.6  2.7-V DC Electrical Characteristics
    7. 6.7  2.7-V AC Electrical Characteristics
    8. 6.8  5-V DC Electrical Characteristics
    9. 6.9  5-V AC Electrical Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 How the LMP201x Works
      2. 7.3.2 The Benefits of LMP201x: No 1/F Noise
      3. 7.3.3 No External Capacitors Required
      4. 7.3.4 Copper Leadframe
      5. 7.3.5 More Benefits
    4. 7.4 Device Functional Modes
      1. 7.4.1 Input Currents
      2. 7.4.2 Overload Recovery
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Extending Supply Voltages and Output Swing with a Composite Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Results
      2. 8.2.2 Precision Strain-gauge Amplifier
      3. 8.2.3 ADC Input Amplifier
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DBV Package
5-Pin SOT-23 Single
Top View
LMP2011 LMP2012 20071502.png
D Package
8-Pin Single SOIC
Top View
LMP2011 LMP2012 20071542.gif

Pin Functions: LMP2011

PIN I/O DESCRIPTION
NAME NO.
DBV D
-IN 4 3 O Inverting input
+IN 3 2 I Non-Inverting input
N/C - 1 - No Internal Connection
N/C - 5 - No Internal Connection
N/C - 8 - No Internal Connection
OUT 1 6 I Output
V- 2 4 P Negative (lowest) power supply
V+ 5 7 P Positive (highest) power supply
D or DGK Package
8-Pin Dual SOIC and VSSOP
Top View
LMP2011 LMP2012 20071538.png

Pin Functions: LMP2012

PIN I/O DESCRIPTION
NAME NO.
D, DGK
–IN A 2 I Inverting input, channel A
+IN A 3 I Non-Inverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Non-Inverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V– 4 P Negative (lowest) power supply
V+ 8 P Positive (highest) power supply