SNOS534J February   2001  – November 2016 LMV712-N , LMV712-N-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - 2.7 V
    6. 6.6 Electrical Characteristics - 5 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Pin
      2. 7.4.2 Capacitive Load Tolerance
      3. 7.4.3 Latchup
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Current-Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Peak Detector
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 GSM Power Amplifier Control Loop
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Differential input voltage ±Supply voltage
Voltage at input or output pin (V+) + 0.4 (V–) – 0.4 V
Supply voltage (V+ – V–) 6 V
V+, V– Output short circuit See(3)
Current at input pin ±10 mA
Current at output pin ±50 mA
TJMAX Junction temperature(4) 150 °C
Tstg Storage temperature –65 150 °C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and specifications.
(3) Shorting circuit output to either V+ or V− adversely affects reliability.
(4) The maximum power dissipation is a function of TJ(MAX) and RθJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA) / RθJA. All numbers apply for packages soldered directly onto a PCB.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±150
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply voltage 2.7 5.5 V
Operating temperature LMV712 –40 85 °C
LMV712-Q1 –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LMV712-N, LMV712-N-Q1 UNIT
YPA (DSBGA) NGY (WSON) DGS (VSSOP)
10 PINS 10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 84.1 70 176.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.6 74.7 67.5 °C/W
RθJB Junction-to-board thermal resistance 21.4 43.7 97.2 °C/W
ψJT Junction-to-top characterization parameter 2.2 2 9.4 °C/W
ψJB Junction-to-board characterization parameter 21.3 43.7 95.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — 11.8 — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics – 2.7 V

All limits ensured for V+ = 2.7 V, V − = 0 V, VCM = 1.35 V, TA = 25°C, and RL > 1 mΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
VOS Input offset voltage
(WSON and VSSOP)		 VCM = 0.85 V and
VCM = 1.85 V		 TA = 25°C 0.4 3 mV
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 3.2
Input offset voltage
(DSBGA only)		 VCM = 0.85 V and
VCM = 1.85 V		 TA = 25°C 3 7
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 9
IB Input bias current LMV712 TA = 25°C 5.5 115 pA
−40°C ≤ TJ ≤ 85°C 130
LMV712-Q1 TA = 25°C 5.5
−40°C ≤ TJ ≤ 125°C 3740
CMRR Common mode rejection ratio 0 V ≤ VCM ≤ 2.7 V TA = 25°C 50 75 dB
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 45
PSRR Power supply rejection ratio 2.7 V ≤ V+ ≤ 5 V,
VCM = 0.85 V		 TA = 25°C 70 90 dB
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 68
2.7 V ≤ V+ ≤ 5 V,
VCM = 1.85 V		 TA = 25°C 70 90
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 68
CMVR Common mode voltage For CMRR ≥ 50 dB V- −0.2 −0.3 V
V+ 3 2.9
ISC Output short circuit current Sourcing
VO = 0 V		 TA = 25°C 15 25 mA
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 12
Sinking
VO = 2.7 V		 TA = 25°C 25 50
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 22
VO Output swing RL = 10 kΩ to
1.35 V		 TA = 25°C 2.62 2.68 V
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 2.6
TA = 25°C 0.01 0.12
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 0.15
RL = 600 Ω to
1.35 V		 TA = 25°C 2.52 2.55
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 2.5
TA = 25°C 0.05 0.23
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 0.3
VO(SD) Output voltage in shutdown 10 200 mV
IS Supply current per channel On mode TA = 25°C 1.22 1.7 mA
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 1.9
Shutdown mode TA = 25°C 0.12 1.5 µA
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 2
AVOL Large signal voltage gain LMV712 Sourcing
RL = 10 kΩ
VO = 1.35 V
to 2.3 V		 TA = 25°C 80 115 dB
−40°C ≤ TJ ≤ 85°C 76
LMV712-Q1 TA = 25°C 115
−40°C ≤ TJ ≤ 125°C 69
LMV712 Sinking
RL = 10 kΩ
VO = 0.4 V
to 1.35 V 		TA = 25°C 80 113
−40°C ≤ TJ ≤ 85°C 76
LMV712-Q1 TA = 25°C 113
−40°C ≤ TJ ≤ 125°C 69
LMV712 Sourcing
RL = 600 Ω
VO = 1.35 V
to 2.2 V 		TA = 25°C 80 97
−40°C ≤ TJ ≤ 85°C 76
LMV712-Q1 TA = 25°C 97
−40°C ≤ TJ ≤ 125°C 64
LMV712 Sinking
RL = 600 Ω
VO = 0.5 V
to 1.35 V		 TA = 25°C 80 100
−40°C ≤ TJ ≤ 85°C 76
LMV712-Q1 TA = 25°C 100
−40°C ≤ TJ ≤ 125°C 62
VSD Shutdown pin voltage On mode 2.4 2.0 V
Shutdown mode 1 0.8
GBWP Gain-bandwidth product 5 MHz
SR Slew rate(3) 5 V/µs
φm Phase margin 60 °
en Input referred voltage noise f = 1 kHz 20 nV/√Hz
TON Turnon time from shutdown TA = 25°C 2.2 4 µs
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 4.6
DSBGA turnon time from shutdown TA = 25°C 6
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 8
(1) All limits are ensured by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(3) Number specified is the slower of the positive and negative slew rates.

6.6 Electrical Characteristics – 5 V

All limits ensured for V+ = 5 V, V − = 0 V, VCM = 2.5 V, TA = 25°C, and RL > 1 mΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
VOS Input offset voltage
(WSON and VSSOP)		 VCM = 0.85 V and
VCM = 1.85 V		 TA = 25°C 0.4 3 mV
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 3.2
Input offset voltage
(DSBGA only)		 VCM = 0.85 V and
VCM = 1.85 V		 TA = 25°C 3 7
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 9
IB Input bias current LMV712 TA = 25°C 5.5 115 pA
−40°C ≤ TJ ≤ 85°C 130
LMV712-Q1 −40°C ≤ TJ ≤ 125°C 3600
CMRR Common mode rejection ratio 0 V ≤ VCM ≤ 5 V TA = 25°C 50 80 dB
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 45
PSRR Power supply rejection ratio 2.7 V ≤ V+ ≤ 5 V,
VCM = 0.85 V		 TA = 25°C 70 90 dB
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 68
2.7 V ≤ V+ ≤ 5 V,
VCM = 1.85 V		 TA = 25°C 70 90
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 68
CMVR Common mode voltage For CMRR ≥ 50 dB V- −0.2 −0.3 V
V+ 5.3 5.2
ISC Output short circuit current Sourcing
VO = 0 V		 TA = 25°C 20 35 mA
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 18
Sinking
VO = 5 V		 TA = 25°C 25 50
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 21
VO Output swing RL = 10 kΩ to 2.5 V TA = 25°C 4.92 4.98 V
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 4.9
TA = 25°C 0.01 0.12
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 0.15
RL = 600 Ω to 2.5 V TA = 25°C 4.82 4.85
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 4.8
TA = 25°C 0.05 0.23
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 0.3
VO(SD) Output voltage in shutdown 10 200 mV
IS Supply current per channel On mode TA = 25°C 1.17 1.7 mA
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 1.9
Shutdown mode TA = 25°C 0.12 1.5 µA
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 2
AVOL Large signal voltage gain LMV712 Sourcing
RL = 10 kΩ
VO = 2.5 V to 4.6 V 		TA = 25°C 80 130 dB
−40°C ≤ TJ ≤ 85°C 76
LMV712-Q1 TA = 25°C 130
−40°C ≤ TJ ≤ 125°C 69
LMV712 Sinking
RL = 10 kΩ
VO = 0.4 V to 2.5 V 		TA = 25°C 80 130
−40°C ≤ TJ ≤ 85°C 76
LMV712-Q1 TA = 25°C 130
−40°C ≤ TJ ≤ 125°C 69
LMV712 Sourcing
RL = 600 Ω
VO = 2.5 V to 4.6 V 		TA = 25°C 80 110
−40°C ≤ TJ ≤ 85°C 76
LMV712-Q1 TA = 25°C 110
−40°C ≤ TJ ≤ 125°C 69
LMV712 Sinking
RL = 600 Ω
VO = 0.4 V to 2.5 V		 TA = 25°C 80 107
−40°C ≤ TJ ≤ 85°C 76
LMV712-Q1 TA = 25°C 107
−40°C ≤ TJ ≤ 125°C 69
VSD Shutdown pin voltage On mode 4.5 3.5 V
Shutdown mode 1.5 0.8
GBWP Gain-bandwidth product 5 MHz
SR Slew rate(3) 5 V/µs
φm Phase margin 60 °
en Input referred voltage noise f = 1 kHz 20 nV/√Hz
TON Turnon time for shutdown TA = 25°C 1.6 4 µs
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 4.6
DSBGA turnon time for shutdown TA = 25°C 6
−40°C ≤ TJ ≤ 85°C (LMV712) or
−40°C ≤ TJ ≤ 125°C (LMV712-Q1)		 8
(1) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(2) All limits are ensured by testing or statistical analysis.
(3) Number specified is the slower of the positive and negative slew rates.

6.7 Typical Characteristics

TA = 25°C, VS = 5 V, and single supply (unless otherwise noted)
LMV712-N LMV712-N-Q1 10137001.gif
Figure 1. Supply Current Per Channel vs Supply Voltage
LMV712-N LMV712-N-Q1 10137003.gif
Figure 3. VOS vs VCM
LMV712-N LMV712-N-Q1 10137006.gif
RL = 600 Ω
Figure 5. Output Positive Swing vs Supply Voltage
LMV712-N LMV712-N-Q1 10137008.gif
VS = 2.7 V
Figure 7. Sourcing Current vs Output Voltage
LMV712-N LMV712-N-Q1 10137009.gif
VS = 2.7 V
Figure 9. Sinking Current vs Output Voltage
LMV712-N LMV712-N-Q1 10137018.gif
VS = 2.7 V
Figure 11. PSRR vs Frequency
LMV712-N LMV712-N-Q1 10137016.gif
Figure 13. CMRR vs Frequency
LMV712-N LMV712-N-Q1 10137012.gif
Figure 15. Open Loop Frequency Response vs RL
LMV712-N LMV712-N-Q1 10137013.gif
Figure 17. Open Loop Frequency Response vs CL
LMV712-N LMV712-N-Q1 10137020.gif
Figure 19. Voltage Noise vs Frequency
LMV712-N LMV712-N-Q1 10137022.gif
VS = 2.7 V
Figure 21. Non-Inverting Large Signal Pulse Response
LMV712-N LMV712-N-Q1 10137023.gif
VS = 2.7 V
Figure 23. Non-Inverting Small Signal Pulse Response
LMV712-N LMV712-N-Q1 10137026.gif
VS = 2.7 V
Figure 25. Inverting Large Signal Pulse Response
LMV712-N LMV712-N-Q1 10137027.gif
VS = 2.7 V
Figure 27. Inverting Small Signal Pulse Response
LMV712-N LMV712-N-Q1 10137030.gif
VS = 5 V
Figure 29. Turnon Time Response
LMV712-N LMV712-N-Q1 10137002.gif
Figure 2. Supply Current vs Supply Voltage (Shutdown)
LMV712-N LMV712-N-Q1 10137005.gif
Figure 4. IB vs VCM Over Temperature
LMV712-N LMV712-N-Q1 10137007.gif
RL = 600 Ω
Figure 6. Output Negative Swing vs Supply Voltage
LMV712-N LMV712-N-Q1 10137010.gif
VS = 5 V
Figure 8. Sourcing Current vs Output Voltage
LMV712-N LMV712-N-Q1 10137011.gif
VS = 5V
Figure 10. Sinking Current vs Output Voltage
LMV712-N LMV712-N-Q1 10137019.gif
VS = 5 V
Figure 12. PSRR vs Frequency
LMV712-N LMV712-N-Q1 10137017.gif
Figure 14. CMRR vs Frequency
LMV712-N LMV712-N-Q1 10137014.gif
Figure 16. Open Loop Frequency Response vs RL
LMV712-N LMV712-N-Q1 10137015.gif
Figure 18. Open Loop Frequency Response vs CL
LMV712-N LMV712-N-Q1 10137021.gif
Figure 20. Voltage Noise vs Frequency
LMV712-N LMV712-N-Q1 10137024.gif
VS = 5 V
Figure 22. Non-Inverting Large Signal Pulse Response
LMV712-N LMV712-N-Q1 10137025.gif
VS = 5 V
Figure 24. Non-Inverting Small Signal Pulse Response
LMV712-N LMV712-N-Q1 10137028.gif
VS = 5 V
Figure 26. Inverting Large Signal Pulse Response
LMV712-N LMV712-N-Q1 10137029.gif
VS = 5 V
Figure 28. Inverting Small Signal Pulse Response
LMV712-N LMV712-N-Q1 10137004.gif
VS = 5 V
Figure 30. Input Common Mode Capacitance vs VCM