SNVS723H October   2011  – October 2023 LMZ10500

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Limit
      2. 7.3.2 Start-up Behavior and Soft Start
      3. 7.3.3 Output Short Circuit Protection
      4. 7.3.4 Thermal Overload Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Circuit Operation
      2. 7.4.2 Input Undervoltage Detection
      3. 7.4.3 Shutdown Mode
      4. 7.4.4 EN Pin Operation
      5. 7.4.5 Internal Synchronous Rectification
      6. 7.4.6 High Duty Cycle Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting the Output Voltage
          1. 8.2.2.2.1 RT and RB Selection for Fixed VOUT
          2. 8.2.2.2.2 Output Voltage Accuracy Optimization
        3. 8.2.2.3 Dynamic Output Voltage Scaling
        4. 8.2.2.4 Integrated Inductor
        5. 8.2.2.5 Input and Output Capacitor Selection
      3. 8.2.3 Application Curves
        1. 8.2.3.1 VOUT = 1.2 V
        2. 8.2.3.2 VOUT = 1.8 V
        3. 8.2.3.3 VOUT = 2.5 V
        4. 8.2.3.4 VOUT = 3.3 V
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Voltage Range
      2. 8.3.2 Current Capability
      3. 8.3.3 Input Connection
        1. 8.3.3.1 Voltage Drops
        2. 8.3.3.2 Stability
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Package Considerations
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • SIL|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Minimum and maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 3.6 V, VEN = 1.2 V, TJ = 25°C(1)
PARAMETERTEST CONDITIONSMIN(1)TYP(2)MAX(1)UNIT
SYSTEM PARAMETERS
VREF × GAINReference voltage × VCON to FB GainVIN = VEN = 5.5 V, VCON = 1.44 V5.75755.8755.9925V
GAINVCON to FB GainVIN = 5.5 V, VCON = 1.44 V2.43752.52.575V/V
VINUVLOVIN rising threshold2.242.412.64V
VINUVLO HYSTVIN UVLO Hysteresis120165200mV
ISHDNShutdown supply currentVIN = 3.6 V, VEN = 0.5 V(3)1118µA
IqDC bias current into VINVIN = 5.5 V, VCON = 1.6 V, IOUT = 0 A6.59.5mA
RDROPOUTVIN to VOUTresistanceIOUT = 200 mA305575mΩ
I LIMDC Output Current LimitVCON = 1.72 V(4)8001000mA
FOSCInternal oscillator frequency1.7522.25MHz
VIH,ENABLEEnable logic HIGH voltage1.2V
VIL,ENABLEEnable logic LOW voltage0.5V
TSDThermal shutdownRising Threshold150°C
TSD-HYSTThermal shutdown hysteresis20°C
DMAXMaximum duty cycle100%
TON-MINMinimum on-time50ns
θJAPackage Thermal Resistance20-mm x 20-mm board
2 layers, 2 oz copper, 0.5W, no airlow		77°C/W
15 mm x 15 mm board
2 layers, 2 oz copper, 0.5W, no airlow		88
10 mm x 10 mm board
2 layers, 2 oz copper, 0.5W, no airlow		107
(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate the Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely parametric norm.
(3) Shutdown current includes leakage current of the high side PFET.
(4) Current limit is built-in, fixed, and not adjustable.