SNVS708G March   2011  – August 2015 LMZ23608

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Synchronization Input
      2. 7.3.2 Current Sharing
      3. 7.3.3 Output Overvoltage Protection
      4. 7.3.4 Current Limit
      5. 7.3.5 Thermal Protection
      6. 7.3.6 Prebiased Start-Up
    4. 7.4 Device Functional Modes
      1. 7.4.1 Discontinuous Conduction and Continuous Conduction Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Steps
        2. 8.2.2.2 Enable Divider, RENT, RENB and RENH Selection
        3. 8.2.2.3 Output Voltage Selection
        4. 8.2.2.4 Soft-Start Capacitor Selection
        5. 8.2.2.5 Tracking Supply Divider Option
        6. 8.2.2.6 COUT Selection
        7. 8.2.2.7 CIN Selection
        8. 8.2.2.8 Discontinuous Conduction and Continuous Conduction Modes Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Power Dissipation and Thermal Considerations
    4. 10.4 Power Module SMT Guidelines
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
VIN to PGND –0.3 40 V
EN, SYNC to AGND –0.3 5.5 V
SS, FB, SH to AGND –0.3 2.5 V
AGND to PGND –0.3 0.3 V
Junction temperature 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) For soldering specifications: see product folder at www.ti.com and SNOA549

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN MAX UNIT
VIN 6 36 V
EN, SYNC 0 5 V
Operation junction temperature −40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LMZ23608 UNIT
NDY
11 PINS
RθJA Junction-to-ambient thermal resistance(3) Natural Convection 9.9 °C/W
225 LFPM 6.8
500 LFPM 5.2
RθJC(top) Junction-to-case (top) thermal resistance 1.0 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Limits are for TJ = 25°C unless otherwise specified. Minimum and Maximum limits are ensured through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 12V, VOUT = 3.3V
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
SYSTEM PARAMETERS
ENABLE CONTROL
VEN EN threshold VEN rising 1.274 V
over the junction temperature (TJ) range of –40°C to +125°C 1.096 1.452
IEN-HYS EN hysteresis source current VEN > 1.274 V 13 µA
SOFT-START
ISS SS source current VSS = 0 V 50 µA
over the junction temperature (TJ) range of –40°C to +125°C 40 60
tSS Internal soft-start interval 1.6 ms
CURRENT LIMIT
ICL Current limit threshold DC average 10.5 A
INTERNAL SWITCHING OSCILLATOR
fosc Free-running oscillator frequency Sync input connected to ground 314 359 404 kHz
fsync Synchronization range Vsync = 3.3 Vp-p 314 600 kHz
VIL-sync Synchronization logic zero amplitude Relative to AGND over the junction temperature (TJ) range of –40°C to +125°C 0.4 V
VIH-sync Synchronization logic one amplitude Relative to AGND over the junction temperature (TJ) range of –40°C to +125°C 1.8 V
SyncDC Synchronization duty cycle range 15% 50% 85%
REGULATION AND OVERVOLTAGE COMPARATOR
VFB In-regulation feedback voltage VSS >+ 0.8 V
IO = 8 A		 0.795 V
over the junction temperature (TJ) range of –40°C to +125°C 0.775 0.815
VFB-OV Feedback over-voltage protection threshold 0.86 V
IFB Feedback input bias current 5 nA
IQ Non-switching quiescent current SYNC = 3 V 3 mA
ISD Shutdown quiescent current VEN = 0 V 32 μA
Dmax Maximum duty factor 85%
THERMAL CHARACTERISTICS
TSD Thermal shutdown Rising 165 °C
TSD-HYST Thermal shutdown hysteresis Falling 15 °C
PERFORMANCE PARAMETERS(4)
ΔVO Output voltage ripple BW at 20 MHz 24 mVPP
ΔVO/ΔVIN Line regulation VIN = 12V to 20 V, IOUT= 8 A ±0.2%
ΔVO/ΔIOUT Load regulation VIN = 12 V, IOUT= 0.001 A to 8 A 1 mV/A
η Peak efficiency VIN = 12 V, VOUT = 3.3 V, IOUT = 5 A 89.5%
η Full load efficiency VIN = 12 V, VOUT = 3.3 V, IOUT = 8 A 88.5%
(1) Minimum and Maximum limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely parametric norm.
(3) Theta JA measured on a 3.0-in x 3.5-in 4-layer board, with 2-oz. copper on outer layers and 1-oz. copper on inner layers, two hundred and ten thermal vias, and 2-W power dissipation. Refer to evaluation board application note layout diagrams.
(4) Refer to BOM in Table 1.

6.6 Typical Characteristics

Unless otherwise specified, the following conditions apply: VIN = 12 V; CIN = 3 x 10 μF + 47-nF X7R Ceramic; COUT = 2 x 330-μF Specialty Polymer + 47-µF Ceramic + 47-nF Ceramic; CFF = 4.7 nF; TA = 25°C for waveforms. All indicated temperatures are ambient.
LMZ23608 30151234.gif
Figure 1. Efficiency 50-V Output at 25°C
LMZ23608 30151236.gif
Figure 3. Efficiency 3.3-V Output at 25°C
LMZ23608 30151238.gif
Figure 5. Efficiency 2.5-V Output at 25°C
LMZ23608 30151240.gif
Figure 7. Efficiency 1.8-V Output at 25°C
LMZ23608 30151242.gif
Figure 9. Efficiency 1.5-V Output at 25°C
LMZ23608 30151244.gif
Figure 11. Efficiency 1.2-V Output at 25°C
LMZ23608 30151246.gif
Figure 13. Efficiency 1-V Output at 25°C
LMZ23608 30151248.gif
Figure 15. Efficiency 5-V Output at 85°C
LMZ23608 30151250.gif
Figure 17. Efficiency 3.3-V Output at 85°C
LMZ23608 30151252.gif
Figure 19. Efficiency 2.5-V Output at 85°C
LMZ23608 30151254.gif
Figure 21. Efficiency 1.8-V Output at 85°C
LMZ23608 30151256.gif
Figure 23. Efficiency 1.5-V Output at 85°C
LMZ23608 30151258.gif
Figure 25. Efficiency 1.2-V Output at 85°C
LMZ23608 30151260.gif
Figure 27. Efficiency 1-V Output at 85°C
LMZ23608 30151262.gif
VOUT = 3.3 V
Figure 29. Normalized Line and Load Regulation
LMZ23608 30151264.gif
VIN = 24 V, VOUT = 3.3 V
Figure 31. Thermal Derating
LMZ23608 30151266.png
12 VIN, 5 VOUT at Full Load, BW = 20 MHz
Figure 33. Output Ripple
LMZ23608 30151267.png
12 VIN, 3.3 VOUT at Full Load, BW = 20 MHz
Figure 35. Output Ripple
LMZ23608 30151268.png
12 VIN, 1.2 VOUT at Full Load, BW = 20 MHz
Figure 37. Output Ripple
LMZ23608 30151272.png
12 VIN, 5 VOUT 1- to 8-A Step
Figure 39. Transient Response
LMZ23608 30151274.png
12 VIN, 1.2 VOUT 1- to 8-A Step
Figure 41. Transient Response
LMZ23608 30151276.png
No CSS
Figure 43. 3.3 VOUT Soft-Start
LMZ23608 30151235.gif
Figure 2. Dissipation 5-V Output at 25°C
LMZ23608 30151237.gif
Figure 4. Dissipation 3.3-V Output at 25°C
LMZ23608 30151239.gif
Figure 6. Dissipation 2.5-V Output at 25°C
LMZ23608 30151241.gif
Figure 8. Dissipation 1.8-V Output at 25°C
LMZ23608 30151243.gif
Figure 10. Dissipation 1.5-V Output at 25°C
LMZ23608 30151245.gif
Figure 12. Dissipation 1.2-V Output at 25°C
LMZ23608 30151247.gif
Figure 14. Dissipation 1-V Output at 25°C
LMZ23608 30151249.gif
Figure 16. Dissipation 5-V Output at 85°C
LMZ23608 30151251.gif
Figure 18. Dissipation 3.3-V Output at 85°C
LMZ23608 30151253.gif
Figure 20. Dissipation 2.5-V Output at 85°C
LMZ23608 30151255.gif
Figure 22. Dissipation 1.8-V Output at 85°C
LMZ23608 30151257.gif
Figure 24. Dissipation 1.5-V Output at 85°C
LMZ23608 30151259.gif
Figure 26. Dissipation 1.2-V Output at 85°C
LMZ23608 30151261.gif
Figure 28. Dissipation 1-V Output at 85°C
LMZ23608 30151263.gif
VIN = 24 V, VOUT = 5 V
Figure 30. Thermal Derating
LMZ23608 30151265.gif
Figure 32. θJA vs Copper Heat Sinking Area
LMZ23608 30151269.png
12 VIN, 5 VOUT at Full Load, BW = 250 MHz
Figure 34. Output Ripple
LMZ23608 30151270.png
12 VIN, 3.3 VOUT at Full Load, BW = 250 MHz
Figure 36. Output Ripple
LMZ23608 30151271.png
12 VIN, 1.2 VOUT at Full Load, BW = 250 MHz
Figure 38. Output Ripple
LMZ23608 30151273.png
12 VIN, 3.3 VOUT 1- to 8-A Step
Figure 40. Transient Response
LMZ23608 30151275.gif
Figure 42. Short Circuit Current vs Input Voltage
LMZ23608 301512a4.png
CSS = 0.47 µF
Figure 44. 3.3 VOUT Soft-Start