SBOSA28 august   2023 LOG200

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High Speed, Logarithmic Current-to-Voltage Conversion
      2. 7.3.2 Voltage and Current References
      3. 7.3.3 Adaptive Photodiode Bias
      4. 7.3.4 Auxiliary Operational Amplifier
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Logarithmic Transfer Function
        1. 8.1.1.1 Logarithmic Conformity Error
    2. 8.2 Typical Application
      1. 8.2.1 Optical Current Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

at TA = 25°C, VS = 5 V (±2.5 V) to 10 V (±5 V), RL = 2 kΩ connected to VS / 2, VCM = VREFA = VREFGND = VS / 2, II1 = 1 µA, and II2 = 1 µA (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LOG CONFORMITY ERROR
Logarithmic conformity error (1) II1 = 10 nA to 100 µA TBD 0.017 dB
TBD ±0.2 %
TA = 0°C to 85°C TBD 0.026 dB
TBD ±0.3 %
II1 = 10 nA to 1 mA  0.017 0.044 dB
0.2 ±0.5 %
TA = 0°C to 85°C TBD 0.087 dB
TBD ±1 %
II1 = 1 nA to 10 mA 0.028 0.065 dB
0.32 ±0.75 %
TA = 0°C to 85°C TBD 0.131 dB
TBD ±1.5 %
TA = –40°C to +125°C TBD 0.265 dB
TBD ±3 %
TRANSFER FUNCTION (GAIN)
Initial scaling factor (2) II1 = 100 pA to 10 mA 252 mV/decade
Scaling factor error II1 = 1 nA to 100 µA –0.7 0.7 %
TA = 0°C to 85°C –0.9 0.9
II1 = 100 pA to 10 mA –1 1
TA = 0°C to 85°C –1.5 1.5
TA = –40°C to +125°C –3.2 3.2
LOGARITHMIC AMPLIFIER INPUT
VOS Offset voltage VI1 – VCM II1 = 1 nA   2 mV
II1 = 1 mA 50
II1 = 1 mA, TA = –40°C to +125°C TBD
VI2 – VCM II2 = 1 nA 2
II2 = 1 mA 2
II1 = 1 mA, TA = –40°C to +125°C   TBD
dVOS/dT Offset voltage drift VI1 – VCM TBD µV/°C
VI2 – VCM TBD
VCM Input common mode voltage (VS–) + 2.3 (VS+) – 2.0 V
CMRR Common-mode rejection ratio (2) (VS–) + 2.3 < VCM < (VS+) – 2.0, II1 = II2 = 1 µA 60 dB
IBIAS ratio II1 = 10 µA 1.143 A/A
II1 = 10 mA 1.175
IBIAS voltage II1 = 10 µA and 10 mA (VS–) (VS+) – 1.0 V
In Input current noise f = 1 kHz II1 = II2 = 1 nA   TBD   pA/√Hz
II1 = II2 = 1 µA   TBD  
LOGARITHMIC AMPLIFIER OUTPUT
VOSO Output offset voltage 1.3 ±7.5 mV
TA = –40°C to +125°C 2.5 ±10 mV
PSRR Power supply rejection ratio II1 = II2 = 1 µA 0.1 mV/V
Voltage output swing (VS–) + 0.3 (VS+) – 0.3 V
Short-circuit current ±20 mA
Capacitive load 100 pF
AUXILIARY OPERATIONAL AMPLIFIER
Offset voltage ±700 µV
TA = –40°C to +125°C   ±1 mV
Offset voltage drift ±3 µV/°C
Input bias current   ±3 µA
TA = –40°C to +125°C   TBD
Input offset current ±100 nA
TA = –40°C to +125°C ±200
Input common mode voltage (VS–) + 1.0 (VS+) – 1.0 V
Input voltage noise density f = 0.1 Hz to 10 kHz 57 nVRMS
f = 1 kHz   4   nV/√Hz
Input current noise f = 1 kHz   1.2   pA/√Hz
AOL Open-loop voltage gain (VS–) + 200 mV < VO < (VS+) – 200 mV, RL = 10 kΩ 126 dB
TA = –40°C to +125°C 120
(VS–) + 200 mV < VO < (VS+) – 200 mV, RL = 2 kΩ 120
TA = –40°C to +125°C 114
GBW Gain-bandwidth product 42 MHz
SR Slew rate 2-V step, G = +1 22 V/μs
tS Settling time To 0.1%, 2-V step, G = +1 120 ns
To 0.01%, 2-V step, G = +1 140
CIN Input capacitance Differential 1.9 pF
Common-mode 0.7
ZO Open-loop output impedance f = 1 MHz 6.3 Ω
NOISE
Voltage noise (3) f = 1 kHz, II2 = IREF II1 = 1 nA 2000 nV/√Hz
II1 = 10 nA 600
II1 = 100 nA 200
II1 = 1 µA 120
FREQUENCY RESPONSE
BW –3-dB bandwidth (4) I1 input II2 = IREF, II1 = 100 pA TBD kHz
II2 = IREF, II1 = 1 nA 0.12 MHz
II2 = IREF, II1 = 10 nA 0.4
II2 = IREF, II1 = 100 nA 1.8
II2 = IREF, II1 = 1 µA to 10 mA 6
I2 input II1 = IREF, II2 = 100 pA TBD kHz
II1 = IREF, II2 = 1 nA TBD MHz
II1 = IREF, II2 = 10 nA TBD
II1 = IREF, II2 = 100 nA TBD
II1 = IREF, II2 = 1 µA to 10 mA TBD
Step response, I1(4) II2 = IREF, II1 = 100 pA to 1 nA Rising 14 µs
Falling 34
II2 = IREF, II1 = 100 pA to 10 nA Rising 2
Falling 22
II2 = IREF, II1 = 10 nA to 100 nA Rising 0.22
Falling 0.63
II2 = IREF, II1 = 100 nA to 1 µA Rising 0.08
Falling 0.24
II2 = IREF, II1 = 100 µA to 1 mA Rising 0.03
Falling 0.08
VOLTAGE REFERENCE
VREF165 REF165 initial voltage 1.646 1.65 1.654 V
REF165 initial accuracy –0.2 0.2 %
VREF25 REF25 initial voltage 2.495 2.5 2.505 V
REF25 initial accuracy –0.2 0.2 %
REFGND compliance voltage (VS–) (VS+) – 4.5 V
Temperature coefficient REF165 reference, REF25 reference 20 ppm/℃
Output current REF165 reference, REF25 reference –2 5 mA
Load regulation REF165 reference, –2 mA < IREF165 < 5 mA TBD µV/mA
REF25 reference, –2 mA < IREF25 < 5 mA TBD
Line regulation 5 V < VS < 10 V REF165 reference TBD µV/V
REF25 reference TBD
Short-circuit current TBD mA
Noise TBD µVRMS
CURRENT REFERENCE
IIREF IREF initial current 0.98 1 1.02 µA
IREF initial accuracy –2 2 %
Temperature coefficient 100 ppm/℃
IREF compliance voltage (VS–) (VS+) – 1.0 V
Output impedance ΔVIREF / ΔIIREF 1.2 GΩ
POWER SUPPLY
IQ Quiescent current IOUTA = IOUTB = 0 mA 9.5 TBD mA
TA = –40°C to +125°C TBD
(1) See definition of logarithmic conformity error in Section 8.1.1.1.
(2) For preview devices, this value is 252 mV/decade. For Production-Data devices, this value will be 250 mV/decade.
(3) Output referred.
(4) Assumes parasitic CIN of 3 pF or less.
(5) Step response is defined as 10% to 90%.