SNVS128M March   2000  – June 2025 LP2982

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
        1. 7.1.1.1 Recommended Capacitors (Legacy Chip)
        2. 7.1.1.2 Recommended Capacitors (New Chip)
      2. 7.1.2 Input Capacitor Requirements
      3. 7.1.3 Output Capacitor Requirements
      4. 7.1.4 Noise Bypass Capacitor (CBYPASS)
      5. 7.1.5 Reverse Current
      6. 7.1.6 Power Dissipation (PD)
      7. 7.1.7 Estimating Junction Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ON/ OFF Input Operation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Nomenclature
    2. 8.2 Third-Party Products Disclaimer
    3. 8.3 Documentation Support
      1. 8.3.1 Related Documentation
    4. 8.4 Receiving Notification of Documentation Updates
    5. 8.5 Support Resources
    6. 8.6 Trademarks
    7. 8.7 Electrostatic Discharge Caution
    8. 8.8 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.3 Application Curves

LP2982 5-V, 2.2-μF ESR Curves (Legacy chip)
VIN = 6 V
Figure 7-5 5-V, 2.2-μF ESR Curves (Legacy chip)
LP2982 Line Transient Response (Legacy chip)
Figure 7-7 Line Transient Response (Legacy chip)
LP2982 Line Transient Response (New Chip)
VOUT = 3.3 V, ΔVIN = 1 V, IOUT = 50 mA, dV/dt = 1 V/μs
Figure 7-9 Line Transient Response (New Chip)
LP2982 Load Transient Response (Legacy chip)
Figure 7-11 Load Transient Response (Legacy chip)
LP2982 Load Transient Response (Legacy chip)
Figure 7-13 Load Transient Response (Legacy chip)
LP2982 Turnon Waveform (Legacy chip)
Figure 7-15 Turnon Waveform (Legacy chip)
LP2982 Turnon Waveform (Legacy chip)
Figure 7-17 Turnon Waveform (Legacy chip)
LP2982 Turnon Waveform (New chip)
Cbyp = 0.1 nF
Figure 7-19 Turnon Waveform (New chip)
LP2982 3-V, 4.7-μF ESR Curves (Legacy chip)
VIN = 4 V
Figure 7-6 3-V, 4.7-μF ESR Curves (Legacy chip)
LP2982 Line Transient Response (Legacy chip)
Figure 7-8 Line Transient Response (Legacy chip)
LP2982 Load Transient Response (Legacy chip)
Figure 7-10 Load Transient Response (Legacy chip)
LP2982 Load Transient Response (Legacy chip)
Figure 7-12 Load Transient Response (Legacy chip)
LP2982 Load Transient Response (New Chip)
dI/dt = 1 A/μs
Figure 7-14 Load Transient Response (New Chip)
LP2982 Turnon Waveform (Legacy chip)
Figure 7-16 Turnon Waveform (Legacy chip)
LP2982 Turnon Waveform (New chip)
Cbyp = 0 nF
Figure 7-18 Turnon Waveform (New chip)
LP2982 Turnon Waveform (New chip)
Cbyp = 1 nF
Figure 7-20 Turnon Waveform (New chip)