SNVS018AB March   2000  – June 2025 LP2985-N

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
        1. 7.1.1.1 Recommended Capacitors (Legacy Chip)
        2. 7.1.1.2 Recommended Capacitors (New Chip)
      2. 7.1.2 Input Capacitor Requirements
      3. 7.1.3 Output Capacitor Requirements
      4. 7.1.4 Noise Bypass Capacitor (CBYPASS)
      5. 7.1.5 Reverse Current
      6. 7.1.6 Power Dissipation (PD)
      7. 7.1.7 Estimating Junction Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ON/OFF Input Operation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Device Nomenclature
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • VIN range: 2.5V to 16V
  • VOUT range (new chip):
    • 1.2V to 5.0V (fixed, 100mV steps)
  • VOUT range (legacy chip): 2.5V to 6.1V
  • VOUT accuracy:
    • ±1% for A-grade (legacy chip)
    • ±1.5% for standard-grade (legacy chip)
    • ±0.5% (new chip)
  • Output accuracy over load, and temperature:
    • ±1% (new chip)
  • Output current: Up to 150mA
  • Low IQ (new chip): 71μA at ILOAD = 0mA
  • Low IQ (new chip): 750μA at ILOAD = 150mA
  • Shutdown current:
    • 0.05μA (typical, legacy chip)
    • 1.12μA (typical, new chip)
  • Low noise: 30μVRMS with 10nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2µF ceramic capacitors (new chip)
  • High PSRR: 70dB at 1kHz, 40dB at 1MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)