SNVS192C October   2002  – November 2015 LP3992

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Input Test Signals
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Shutdown and Enable
      2. 8.3.2 Fast Turnon and Turnoff
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable Operation
  9. 9 Application And Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Capacitors
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 No-Load Stability
        5. 9.2.2.5 Capacitor Characteristics
        6. 9.2.2.6 Power Dissipation
        7. 9.2.2.7 Estimating Junction Temperature
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
Input voltage –0.3 6.5 V
Output voltage –0.3 to (VIN + 0.3) 6.5 V
Shutdown input voltage –0.3 6.5 V
Maximum power dissipation 568 mW
Junction temperature 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to the potential at the GND pin.
(3) If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Machine model ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN NOM MAX UNIT
Input voltage 1.9 5.2 V
Shutdown input voltage 0 6 V
Junction temperature –40 125 °C
Power dissipation at 25°C 454 mW
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. For ensured performance limits and associated test conditions, see Electrical Characteristics.

6.4 Thermal Information

THERMAL METRIC(1) LP3992 UNIT
DBV (SOT-23)
5 PINS
RθJA Junction-to-ambient thermal resistance 170.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 124.4 °C/W
RθJB Junction-to-board thermal resistance 30.9 °C/W
ψJT Junction-to-top characterization parameter 17.6 °C/W
ψJB Junction-to-board characterization parameter 30.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise noted, VEN = 1.15, VIN = VOUT + 1 V, CIN = 1 µF, IOUT = 1 mA, COUT = 1 µF; typical values and limits apply for TJ = 25°C, and minimum and maximum limits apply over the full temperature range for operation, −40°C to +125°C.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage TJ = 25°C 1.9 5.2 mV
ΔVOUT Output voltage tolerance Over full line and load regulation. –90 90 mV
Line regulation error VIN = (VOUT(NOM) + 1 V) to 5.2 V,
IOUT = 1 mA		 –0.27 0.27 %/V
Load regulation error IOUT = 1 mA to 30 mA 100 220 µV/mA
ILOAD Load current See(2) and (3) 0 µA
IQ Quiescent current VEN = 1.15 V, IOUT = 0 mA 26 50 µA
VEN = 1.15 V, IOUT = 30 mA 29 50
VEN = 0.4 V 0.003 1.5
ISC Short-circuit current limit See(4) 90 mA
PSRR Power Supply Rejection Ratio ƒ = 1 kHz, IOUT = 30 mA 40 dB
ƒ = 20 kHz, IOUT = 30 mA 30
EEN Output noise voltage(3) BW = 10 Hz to 100 kHz, VIN = 4.2 V 300 µVRMS
TSHUTDOWN Thermal shutdown temperature 160 °C
Thermal shutdown hysteresis 20
ENABLE CONTROL CHARACTERISTICS
IEN Maximum input current at EN input VEN = 0 V and VIN = 5.2 V 0.001 µA
VIL Low input threshold VIN = 1.8 V to 5.2 V 0.4 V
VIH High input threshold VIN = 1.8 V to 5.2 V 1.15 V
Transient response Line transient response |δVOUT| Trise = Tfall = 10 µS(3) 60 mV
Load transient response |δVOUT| Trise = Tfall = 1 µS
IOUT = 100 µA to 5 mA(3)		 60
(1) All limits are ensured. All electrical characteristics having room-temperature limits are tested during production at TJ = 25°C or correlated using Statistical Quality Control methods. Operation over the temperature specification is specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
(2) The device maintains the regulated output voltage without the load.
(3) This electrical specification is specified by design.
(4) Short-circuit current is measured on the input supply line at the point when the short-circuit condition reduces the output voltage to 95% of its nominal value.

6.6 Timing Requirements

MIN NOM MAX UNIT
tON1 Turnon time(1), 50% to 85% of VOUT(NOM)(2) 15 µs
tON2 Turnon time(1) to 95% level(3) 40 µs
tOFF1 Turnoff time(1), 85% to 50% of VOUT(NOM)(4) µs
tOFF2 Turnoff time(1), 95% to 5% level(5) 40 15 µs
(1) This electrical specification is ensured by design.
(2) Time for VOUT to rise from 50% to 85% of VOUT(NOM) (Figure 1).
(3) Time from VEN = 1.15 V to VOUT = 95% (VOUT(NOM)) (Figure 1).
(4) Time for VOUT to fall from 85% to 50% of VOUT(NOM) (Figure 1).
(5) Time from VEN = 0.4 V to VOUT = 5% (VOUT(NOM) (Figure 1).
LP3992 20041203.png Figure 1. tON and tOFF Timing Diagram

6.7 Typical Characteristics

Unless otherwise specified, CIN = COUT = 1-µF ceramic, VIN = 2.8 V, TA = 25°C, EN pin is tied to VIN.
LP3992 20041207.png
Figure 2. Output Voltage Change vs Temperature
LP3992 20041209.png
25°C
Figure 4. Ground Current vs VIN
LP3992 20041211.png
Figure 6. Short-Circuit Current
LP3992 20041213.png
Figure 8. Line Transient Response
LP3992 20041215.png
Figure 10. Turnon, Turnoff Timing
LP3992 20041217.png
Figure 12. Ripple Rejection
LP3992 20041208.png
Figure 3. Ground Current vs Load Current
LP3992 20041210.png
125°C
Figure 5. Ground Current vs VIN
LP3992 20041212.png
Figure 7. Short-Circuit Current
LP3992 20041214.png
Figure 9. Line Transient Response
LP3992 20041216.png
Figure 11. Turnon, Turnoff Timing