SNVSCD0A November   2023  – November 2023 LP5810

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
  8. Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Dimming
      2. 8.3.2 PWM Dimming
      3. 8.3.3 Autonomous Animation Engine Control
        1. 8.3.3.1 Animation Engine Pattern
        2. 8.3.3.2 Sloper
        3. 8.3.3.3 Animation Engine Unit (AEU)
        4. 8.3.3.4 Animation Pause Unit (APU)
      4. 8.3.4 Protections and Diagnostics
        1. 8.3.4.1 LED Open Detections
        2. 8.3.4.2 LED Short Detections
        3. 8.3.4.3 Thermal Shutdown
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 I2C Data Transactions
      2. 8.5.2 I2C Data Format
  10. Register Maps
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Application
      2. 10.2.2 Design Parameters
      3. 10.2.3 Detailed Design Procedure
        1. 10.2.3.1 Input Capacitor Selection
        2. 10.2.3.2 Program Procedure
        3. 10.2.3.3 Programming Example
      4. 10.2.4 Application Performance Plots
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

I2C Data Format

The address and data bits are transmitted MSB first with 8-bits length format in each cycle. Each transmission is started with Address Byte 1, which are divided into 5 bits of the chip address, 2 higher bits of the register address, and 1 read/write bit. The other 8 lower bits of register address are put in Address Byte 2.The device supports both independent mode and broadcast mode. The auto-increment feature allows writing / reading several consecutive registers within one transmission. If not consecutive, a new transmission must be started. The Bit 4 and Bit 3 are determined by the device, which can refer to Section 4.

Table 8-4 I2C Data Format
Address Byte1 Chip Address Register Address R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Independent 1 0 1 Bit 4 Bit 3 9th bit 8th bit R: 1 W: 0
Broadcast 1 1 0 1 1
Address Byte2 Register Address
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
7th bit 6th bit 5th bit 4th bit 3rd bit 2nd bit 1st bit 0 bit
GUID-CF80E4ED-4DF0-477A-A9D8-41C4D11C579C-low.svg Figure 8-10 I2C Write Timming
GUID-B79579D6-ECCF-4842-861E-9850596C0E82-low.svg Figure 8-11 I2C Read Timing