SNVSC74D September   2023  – October 2026 LP5813

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Synchronous Boost Converter
        1. 7.3.1.1 Undervoltage Lockout
        2. 7.3.1.2 Enable and Soft Start
        3. 7.3.1.3 Switching Frequency
        4. 7.3.1.4 Current Limit Operation
        5. 7.3.1.5 Boost PWM Mode
        6. 7.3.1.6 Boost PFM Mode
        7. 7.3.1.7 Pass-Through Mode
      2. 7.3.2 Time-Cross-Multiplexing (TCM) Scheme
        1. 7.3.2.1 Direct drive mode
        2. 7.3.2.2 TCM Drive Mode
        3. 7.3.2.3 Mix drive mode
        4. 7.3.2.4 Ghosting Elimination
      3. 7.3.3 Analog Dimming
      4. 7.3.4 PWM Dimming
      5. 7.3.5 Autonomous Animation Engine Control
        1. 7.3.5.1 Animation Engine Pattern
        2. 7.3.5.2 Sloper
        3. 7.3.5.3 Animation Engine Unit (AEU)
        4. 7.3.5.4 Animation Pause Unit (APU)
      6. 7.3.6 Protections and Diagnostics
        1. 7.3.6.1 Overvoltage Protection
        2. 7.3.6.2 Output Short-to-Ground Protection
        3. 7.3.6.3 LED Open Detections
        4. 7.3.6.4 LED Short Detections
        5. 7.3.6.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
  9. 8 Register Map Table
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Application
      2. 9.2.2 Design Parameters
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Inductor Selection
        2. 9.2.3.2 Output Capacitor Selection
        3. 9.2.3.3 Input Capacitor Selection
        4. 9.2.3.4 Program Procedure
        5. 9.2.3.5 Programming Example
      4. 9.2.4 Application Performance Plots
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2.4 Ghosting Elimination

The LP5813 integrates ghosting elimination circuits to avoid both upside and downside ghosting phenomenon. The ghosting elimination can be disabled by setting clamp_dis = 1h, which is default as 0 and enabling the function.

Figure 7-12 demonstrates the determination of the ghosting elimination clamp is enabled or disabled on the OUTx (x = 0, 1, 2, 3).

When the clamp is enabled on the OUTx (x = 0, 1, 2, 3), the clamp enable state keeps until switches scanning is stopped. The clamp enable or disable determination is implemented again once the switches scanning is started.

When the clamp is disabled on the OUTx (x = 0, 1, 2, 3), the clamp enable or disable determination is implemented for the OUTx when enters the switching period every time.

If the clamp is enabled during the blank time, the typical pull up current of the internal clamp circuit is about 580uA when the voltage on the OUTx (x = 0, 1, 2, 3) is 0.6V lower than the set clmap voltage, and the typical pull down current is about 520uA when the voltage on the OUTx (x = 0, 1, 2, 3) is 0.6V higher than the set clmap voltage. If the clamp is enabled during the switching period, the typical pull up current of the internal clamp circuit is about 250uA when the voltage on the OUTx (x = 0, 1, 2, 3) is 0.6V lower than the set clmap voltage, and the typical pull down current is about 8uA when the voltage on the OUTx (x = 0, 1, 2, 3) is 0.6V higher than the set clmap voltage.


LP5813 Ghosting Elimination Clamp Determine Flow Chart

Figure 7-12 Ghosting Elimination Clamp Determine Flow Chart

A middle voltage Vmid between VOUT and VOUT - Vf is used to clamp the OUTx (x = 0, 1, 2, 3), where Vf is the forward voltage of LED. This scheme can achieve both pre-discharge for scan switch FET and pre-charge for current sinks, which eliminate up-side and down-side ghosting issues in time-multiplexing topology. Since the clamp voltage for scan switch FET and current sinks is the same value, the reverse voltage on LED during deghosting is avoided. There are 4 options for Vmid which is selected in 'vmid_sel' bits in Dev_Config12 register, which can be used for different forward voltage range of different type LEDs.

LP5813 Ghosting elimination waveform when clamp_sel = 1 Figure 7-13 Ghosting elimination waveform when clamp_sel = 1
LP5813 Ghosting elimination waveform when clamp_sel = 0 Figure 7-14 Ghosting elimination waveform when clamp_sel = 0