SNVSCS3 February   2025 LP5892-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Independent and Stackable Mode
        1. 6.3.1.1 Independent Mode
        2. 6.3.1.2 Stackable Mode
      2. 6.3.2 Current Setting
        1. 6.3.2.1 Brightness Control (BC) Function
        2. 6.3.2.2 Color Brightness Control (CC) Function
        3. 6.3.2.3 Choosing BC/CC for a Different Application
      3. 6.3.3 Frequency Multiplier
      4. 6.3.4 Line Transitioning Sequence
      5. 6.3.5 Protections and Diagnostics
        1. 6.3.5.1 Thermal Shutdown Protection
        2. 6.3.5.2 IREF Resistor Short Protection
        3. 6.3.5.3 LED Open Load Detection and Removal
          1. 6.3.5.3.1 LED Open Detection
          2. 6.3.5.3.2 Read LED Open Information
          3. 6.3.5.3.3 LED Open Caterpillar Removal
        4. 6.3.5.4 LED Short and Weak Short Circuitry Detection and Removal
          1. 6.3.5.4.1 LED Short/Weak Short Detection
          2. 6.3.5.4.2 Read LED Short Information
          3. 6.3.5.4.3 LSD Caterpillar Removal
    4. 6.4 Device Functional Modes
    5. 6.5 Continuous Clock Series Interface
      1. 6.5.1 Data Validity
      2. 6.5.2 CCSI Frame Format
      3. 6.5.3 Write Command
        1. 6.5.3.1 Chip Index Write Command
        2. 6.5.3.2 VSYNC Write Command
        3. 6.5.3.3 MPSM Write Command
        4. 6.5.3.4 Standby Clear and Enable Command
        5. 6.5.3.5 Soft_Reset Command
        6. 6.5.3.6 Data Write Command
      4. 6.5.4 Read Command
    6. 6.6 PWM Grayscale Control
      1. 6.6.1 Grayscale Data Storage and Display
        1. 6.6.1.1 Memory Structure Overview
        2. 6.6.1.2 Details of Memory Bank
        3. 6.6.1.3 Write a Frame Data into Memory Bank
      2. 6.6.2 PWM Control for Display
    7. 6.7 Register Maps
      1. 6.7.1  FC0
      2. 6.7.2  FC1
      3. 6.7.3  FC2
      4. 6.7.4  FC3
      5. 6.7.5  FC4
      6. 6.7.6  FC14
      7. 6.7.7  FC15
      8. 6.7.8  FC17
      9. 6.7.9  FC19
      10. 6.7.10 FC20
      11. 6.7.11 FC21
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 System Structure
        2. 7.2.1.2 SCLK Frequency
        3. 7.2.1.3 Internal GCLK Frequency
        4. 7.2.1.4 Line Switch Time
        5. 7.2.1.5 Blank Time Removal
        6. 7.2.1.6 BC and CC
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Chip Index Command
        2. 7.2.2.2 FC Registers Settings
        3. 7.2.2.3 Grayscale Data Write
        4. 7.2.2.4 VSYNC Command
        5. 7.2.2.5 LED Open, Short Read
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

At VCC = VR = 2.8V, VG/B = 3.8V, TA = –40°C to +125°C; Typical values are at TA = 25°C (unless otherwise specified)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VCCDevice supply voltageICH <=20mA2.55.5V
ICH >=20mA3.55.5
VUVRUndervoltage restartVCC rising2.3V
VUVFUndervoltage shutdownVCC falling2.0V
VUV(HYS)Undervoltage shutdown hysteresis0.1V
ICCDevice supply currentSCLK/SIN = 10MHz, MPSM_EN=1bit, Matrix PSM enable, internal GCLK off, GSn = 0000h, BC = 2h, CCR/G/B = 63h, PS_EN= 1h, VOUTn = floating, RIREF = 7.8kΩ (In intelligent power save mode)0.9mA
SCLK/SIN = 10MHz, Standby enable, internal GCLK off, GSn = 0000h, BC = 2h, CCR/G/B = 63h, PS_EN= 1h, VOUTn = floating, RIREF = 7.8kΩ (In intelligent power save mode)

0.9

mA

SCLK/SIN = 10MHz, PSP_MOD=1bit, internal GCLK=50MHz, GSn = 0000h, BC = 2h, CCR/G/B = 63h, PS_EN= 1h, VOUTn = floating, RIREF = 7.8kΩ (In power save mode)

3.6

mA
SCLK = 10MHz, internal GCLK = 50 MHz, GSn = 1FFFh, BC = 2h, CCR/G/B = 63h,VOUTn = floating, RIREF = 7.8kΩ, ICH = 2mA3.6mA
SCLK = 10MHz, internal GCLK = 100 MHz, GSn = 1FFFh, BC = 2h, CCR/G/B = 63h, VOUTn = floating, RIREF = 7.8kΩ, ICH = 2mA4.9mA
VR/G/BLED supply voltage2.55.5V
VIHHigh level input voltage (SCLK, SIN)0.7 × VCCV
VILLow level input voltage (SCLK, SIN)0.3 × VCCV
VOHHigh level output voltage (SOUT)IOH = –2mA at SOUTVCC-0.4VCCV
VOLLow level output voltage (SOUT)IOL = 2mA at SOUT0.4V
ILOGICLogic pin current (SCLK, SIN)SCLK/SIN = VCC or GND-11uA
RDS(ON)Scan switches' on-state resistance (LINE0 to LINE15)VCC = 2.8V, TA= 25°C190mΩ
VIREFReference voltageSCLK/SIN = GND, internal GCLK= 0MHz, GSn = 0000h, BC = 2h, CCR/G/B = 63h, VOUTn = floating, RIREF = 7.8kΩ0.8V
VKNEEChannel knee voltage (R0-R15 / G0-G15 / B0-B15)VLEDR/G/B =2.5V, all channel outputs on, output current at 1mA0.25V
VLEDR/G/B =2.5V, all channel outputs on, output current at 5mA0.27V
VLEDR/G/B =2.5V, all channel outputs on, output current at 10mA0.31V
VLEDR/G/B =2.5V, IMAX = 1b, all channel outputs on, output current at 15mA0.37V
VLEDR/G/B =2.5V, IMAX=1b, all channel outputs on, output current at 20mA0.41V
VCC = 3.5V, IMAX=1b, all channel outputs on, output current at 25mA0.45V
VCC = 3.5V, IMAX=1b, all channel outputs on, output current at 30mA0.53V
VCC = 3.5V, IMAX=1b, all channel outputs on, output current at 35mA0.62V
VCC = 3.5V, IMAX=1b, all channel outputs on, output current at 40mA0.71V
ICH(LKG)Channel leakage current (R0-R15 / G0-G15 / B0-B15)Channel voltage at 0V1uA
ΔIERR(CC)Constant-current channel to channel deviation (R0-R15 / G0-G15 / B0-B15)(1)All CHn = on, BC = 00h, CC = 31h, VOUTn = (VLED-1)V, RIREF = 19.05kΩ (ICH = 0.2mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±1±2.5%
All CHn = on, BC = 00h, CC = 7Dh, VOUTn = (VLED-1)V, RIREF = 19.05kΩ (ICH = 0.5mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±1.5%
All CHn = on, BC = 00h, CC = FBh, VOUTn = (VLED-1)V, RIREF = 19.05kΩ (ICH = 1mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±1.5%
All CHn = on, BC = 2h, CC = FBh, VOUTn = (VLED-1)V, RIREF = 7.8kΩ (ICH = 5mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2.5%
All CHn = on, BC = 6h, CC = A7h, VOUTn = (VLED-1)V, RIREF = 7.8kΩ (ICH = 10mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2.5%
All CHn = on, BC = 7h, CC = FBh, IMAX=1b, VOUTn = (VLED-1)V, RIREF = 6.8kΩ (ICH = 20mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2.7%
All CHn = on, BC = 7h, CC = FDh, IMAX=1b, VOUTn = (VLED-1)V, VCC=3.5V, RIREF = 5.49kΩ (ICH = 25mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±3%
All CHn = on, BC = 7h, CC = FAh, IMAX=1b, VOUTn = (VLED-1)V, VCC=3.5V, RIREF = 4.53kΩ (ICH = 30-mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±3%
All CHn = on, BC = 7h, CC = FCh, IMAX=1b, VOUTn = (VLED-1)V, VCC=3.5V, RIREF = 3.92kΩ (ICH = 35mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±3%
All CHn = on, BC = 7h, CC = FAh, IMAX=1b, VOUTn = (VLED-1)V, VCC=3.5V, RIREF = 3.4kΩ (ICH = 40mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±3%
ΔIERR(DD)Constant-current device to device deviation (R0-R15 / G0-G15 / B0-B15)(2)All CHn = on, BC = 00h, CC = 31h, VOUTn = (VLED-1)V, RIREF = 19.05kΩ (ICH = 0.2mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±1±2.5%
All CHn = on, BC = 00h, CC = 7Dh, VOUTn = (VLED-1)V, RIREF = 19.05kΩ (ICH = 0.5mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2%
All CHn = on, BC = 00h, CC = FBh, VOUTn = (VLED-1)V, RIREF = 19.05kΩ (ICH = 1mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±1.5%
All CHn = on, BC = 2h, CC = FBh, VOUTn = (VLED-1)V, RIREF = 7.8kΩ (ICH = 5mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2%
All CHn = on, BC = 6h, CC = A7h, VOUTn = (VLED-1)V, RIREF = 7.8kΩ (ICH = 10mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2%
All CHn = on, BC = 7h, CC = FBh, IMAX=1b, VOUTn = (VLED-1)V, RIREF = 6.8kΩ (ICH = 20mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2%
All CHn = on, BC = 7h, CC = FDh, IMAX=1b, VOUTn = (VLED-1)V, VCC=3.5V, RIREF = 5.49kΩ (ICH = 25mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2.5%
All CHn = on, BC = 7h, CC = FAh, IMAX=1b, VOUTn = (VLED-1)V, VCC=3.5V, RIREF = 4.53kΩ (ICH = 30mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2.5%
All CHn = on, BC = 7h, CC = FCh, IMAX=1b, VOUTn = (VLED-1)V, VCC=3.5V, RIREF = 3.92kΩ (ICH = 35mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2.5%
All CHn = on, BC = 7h, CC = FAh, IMAX=1b, VOUTn = (VLED-1)V, VCC=3.5V, RIREF = 3.4kΩ (ICH = 40mA target), TA = 25°C, includes the VIREF tolerance, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±0.5±2.5%
ΔIREG(LINE)Line regulation (R0-R15 / G0-G15 / B0-B15)(3)VLED = 2.5 to 5.5V, All CHn = on, VOUTn = (VLED-1)V, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±1%/V
ΔIREG(LOAD)Load regulation (R0-R15 / G0-G15 / B0-B15)(4)VOUTn = (VLED-1)V to (VLED-3)V, VR=VG/B=VLED=3.8V, All CHn = on, at same color grouped outputs of R0-R15 / G0-G15 / B0-B15±1%/V
TTSDThermal shutdown threshold170°C
THYSThermal shutdown hysteresis15°C
(1) The deviation of each output in same color group (OUTR0-15 or OUTG0-15 or OUTB0-15) from the average of same color group constant current. The deviation is calculated by the formula. (X = R or G or B, n = 0-15) LP5892-Q1

(2) The deviation of the average of constant-current in each color group from the ideal constant-current value. (X = R or G or B) :
LP5892-Q1 Ideal current is calculated by the following equation: LP5892-Q1

(3) Line regulation is calculated by the following equation. (X = R or G or B, n = 0-15): ∆%V=IXn at VLED=5.5 V-IXn at VLED=2.5 VIXn at VLED=2.5 V×1005.5 V-2.5 V

(4) Load regulation is calculated by the following equation. (X = R or G or B, n = 0-15): ∆%V=IXn at VXn=1 V-IXn at VXn=3 VIXn at VXn=3 V×1003 V-1 V