SBOSAC7A february   2023  – july 2023 OPA1633

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Function
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Common-Mode Voltage
        1. 8.1.1.1 Resistor Matching
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations
        2. 8.4.1.2 Power Dissipation and Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2 Detailed Design Procedure

Supply voltages of ±15 V are commonly used for the OPA1633. The relatively low input voltage swing required by the ADC allows use of lower power-supply voltage, if desired. Power supplies as low as ±8 V can be used in this application with excellent performance. This lower-voltage operation reduces power dissipation and heat rise. Bypass power supplies with 10-μF tantalum capacitors in parallel with 0.1-μF ceramic capacitors to avoid possible oscillations and instability.

The VCOM reference voltage output on the PCM1804 ADC provides the proper input common-mode reference voltage (2.5 V). This VCOM voltage is buffered with op amp by the OPA134 and drives the output common-mode voltage pin of the OPA1633. This biases the average output voltage of the OPA1633 to 2.5 V.

The signal gain of the circuit is generally set to approximately 0.25 to be compatible with commonly used audio line levels. Gain can be adjusted, if necessary, by changing the values of R1 and R2. Keep the feedback resistor values (R3 and R4) relatively low, as indicated, for best noise performance.

Resistors R5, R6, and C3 provide an input filter and charge glitch reservoir for the ADC. The values shown are generally satisfactory. Some adjustment of the values can help optimize performance with different ADCs.

Make sure to maintain accurate resistor matching on R1/R2 and R3/R4 to achieve good differential signal balance. Use 1% resistors for highest performance. When connected for single-ended inputs (inverting input grounded, see Figure 8-1), the source impedance must be low. Differential input sources must have well-balanced or low source impedance.

Choose capacitors C1, C2, and C3 carefully for good distortion performance. Polystyrene, polypropylene, NPO ceramic, and mica types are generally excellent. Polyester and high-K ceramic types such as Z5U can create distortion.