SBOS477B December   2011  – December 2016 OPA1652 , OPA1654

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA1652
    5. 6.5 Thermal Information: OPA1654
    6. 6.6 Electrical Characteristics: VS = ±15 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Phase Reversal Protection
      2. 7.3.2 Input Protection
      3. 7.3.3 Electrical Overstress
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Voltage
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Noise Performance
      2. 8.1.2 Total Harmonic Distortion Measurements
      3. 8.1.3 Capacitive Loads
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI™ (Free Software Download)
        2. 11.1.1.2 DIP Adapter EVM
        3. 11.1.1.3 Universal Operational Amplifier EVM
        4. 11.1.1.4 Smart Amplifier Speaker Characterization Board Evaluation Module
        5. 11.1.1.5 TI Precision Designs
        6. 11.1.1.6 WEBENCH Filter Designer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resource
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage Supply voltage, VS = (V+) – (V–) 40 V
Input (V–) – 0.5 (V+) + 0.5 V
Current Input (all pins except power-supply pins) –10 10 mA
Output short-circuit(2) Continuous
Temperature Operating, TA –55 125 °C
Junction, TJ 200 °C
Storage, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Short-circuit to VS / 2 (ground in symmetrical dual supply setups), one amplifier per package.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
Machine model (MM) ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage 4.5 (±2.25) 36 (±18) V
TA Operating temperature –40 85 °C

6.4 Thermal Information: OPA1652

THERMAL METRIC(1) OPA1652 UNIT
D (SOIC) DGK (VSSOP) DRG (WSON)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 143.6 218.9 66.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 76.9 78.6 54.5 °C/W
RθJB Junction-to-board thermal resistance 61.8 103.7 40.4 °C/W
ψJT Junction-to-top characterization parameter 27.8 14.6 1.9 °C/W
ψJB Junction-to-board characterization parameter 61.3 101.8 40.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A 10.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Thermal Information: OPA1654

THERMAL METRIC(1) OPA1654 UNIT
D (SOIC) PW (TSSOP)
14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 90.1 126.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 54.8 46.6 °C/W
RθJB Junction-to-board thermal resistance 44.4 58.6 °C/W
ψJT Junction-to-top characterization parameter 19.9 5.5 °C/W
ψJB Junction-to-board characterization parameter 44.2 57.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.6 Electrical Characteristics: VS = ±15 V

at TA = 25°C, RL = 2 kΩ, and VCM = VOUT = midsupply, unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AUDIO PERFORMANCE
THD + N Total harmonic distortion + noise 0.00005%
G = 1, f = 1 kHz, VO = 3 VRMS –126 dB
IMD Intermodulation distortion G = 1,
VO = 3 VRMS		 SMPTE and DIN Two-Tone, 4:1
(60 Hz and 7 kHz)		 0.00005%
–126 dB
DIM 30 (3-kHz square wave and 15-kHz sine wave) 0.00005%
–126 dB
CCIF Twin-Tone
(19 kHz and 20 kHz)		 0.00005%
–126 dB
FREQUENCY RESPONSE
GBW Gain-bandwidth product G = 1 18 MHz
SR Slew rate G = –1 10 V/µs
Full power bandwidth(1) VO = 1 VP 1.6 MHz
Overload recovery time G = –10 1 µs
Channel separation (dual and quad) f = 1 kHz –120 dB
NOISE
en Input voltage noise f = 20 Hz to 20 kHz 4.0 µVPP
Input voltage noise density f = 1 kHz 4.5 nV/√Hz
f = 10 kHz 3.8 nV/√Hz
In Input current noise density f = 1 kHz 3 fA/√Hz
OFFSET VOLTAGE
VOS Input offset voltage VS = ±2.25 V to ±18 V ±0.5 ±1.5 mV
VS = ±2.25 V to ±18 V, TA = –40°C to 85°C(2) 2 8 µV/°C
PSRR Power-supply rejection ratio VS = ±2..25 V to ±18 V 3 8 µV/V
INPUT BIAS CURRENT
IB Input bias current VCM = 0 V ±10 ±100 pA
IOS Input offset current VCM = 0 V ±10 ±100 pA
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) + 0.5 (V+) – 2 V
CMRR Common-mode rejection ratio 100 110 dB
INPUT IMPEDANCE
Differential 100 || 6 MΩ || pF
Common-mode 6000 || 2 GΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V–) + 0.8 V ≤ VO ≤ (V+) – 0.8 V, RL = 2 kΩ 106 114 dB
OUTPUT
VOUT Voltage output RL = 2 kΩ (V–) + 0.8 (V+) – 0.8 V
IOUT Output current See Typical Characteristics mA
ZO Open-loop output impedance f = 1 MHz See Typical Characteristics Ω
ISC Short-circuit current(3) ±50 mA
CLOAD Capacitive load drive 100 pF
POWER SUPPLY
VS Specified voltage ±2.25 ±18 V
IQ Quiescent current
(per channel)		 IOUT = 0 A 2 2.5 mA
IOUT = 0 A, TA = –40°C to 85°C(2) 2.8 mA
TEMPERATURE
Specified range –40 85 °C
Operating range –55 125 °C
(1) Full-power bandwidth = SR / (2π × VP), where SR = slew rate.
(2) Specified by design and characterization.
(3) One channel at a time.

6.7 Typical Characteristics

at TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
OPA1652 OPA1654 C006_SBOS477.png
Figure 1. Input Voltage Noise Density vs Frequency
OPA1652 OPA1654 G003_SBOS489.gif
Figure 3. Voltage Noise vs Source Resistance
OPA1652 OPA1654 G005_SBOS477.png
Figure 5. Gain and Phase vs Frequency
OPA1652 OPA1654 G007_SBOS477.png
Figure 7. THD+N Ratio vs Frequency
OPA1652 OPA1654 G009_SBOS477.png
Figure 9. THD+N Ratio vs Frequency
OPA1652 OPA1654 G011_SBOS477.png
Figure 11. THD+N Ratio vs Output Amplitude
OPA1652 OPA1654 G013_SBOS477.png
Figure 13. Channel Separation vs Frequency
OPA1652 OPA1654 G015_SBOS477.gif
Figure 15. Small-Signal Step Response (100 mV)
OPA1652 OPA1654 G017_SBOS477.gif
Figure 17. Large-Signal Step Response
OPA1652 OPA1654 G019_SBOS477.gif
Figure 19. Small-Signal Overshoot vs Capacitive Load
OPA1652 OPA1654 G021_SBOS477.gif
Figure 21. Small-Signal Overshoot vs Feedback Capacitor (100-mV Output Step)
OPA1652 OPA1654 G023_SBOS477.png
Figure 23. IB and IOS vs Temperature
OPA1652 OPA1654 G025_SBOS477.png
Figure 25. Supply Current vs Temperature
OPA1652 OPA1654 G029_SBOS477.png
Figure 27. Output Voltage vs Output Current
OPA1652 OPA1654 G031_SBOS477.png
Figure 29. Phase Margin vs Capacitive Load
OPA1652 OPA1654 G033_SBOS477.gif
Figure 31. Negative Overload Recovery
OPA1652 OPA1654 G030_SBOS477.png
Figure 33. Open-Loop Output Impedance vs Frequency
OPA1652 OPA1654 G002_SBOS477.gif
Figure 2. 0.1-Hz to 10-Hz Noise
OPA1652 OPA1654 G004_SBOS477.png
Figure 4. Maximum Output Voltage vs Frequency
OPA1652 OPA1654 G006_SBOS477.png
Figure 6. Closed-Loop Gain vs Frequency
OPA1652 OPA1654 G008_SBOS477.gif
Figure 8. THD+N Ratio vs Frequency
OPA1652 OPA1654 G010_SBOS477.gif
Figure 10. THD+N Ratio vs Frequency
OPA1652 OPA1654 G012_SBOS477.png
Figure 12. Intermodulation Distortion vs Output Amplitude
OPA1652 OPA1654 G014_SBOS477.png
Figure 14. CMRR and PSRR vs Frequency
(Referred to Input)
OPA1652 OPA1654 G016_SBOS477.gif
Figure 16. Small-Signal Step Response (100 mV)
OPA1652 OPA1654 G018_SBOS477.gif
Figure 18. Large-Signal Step Response
OPA1652 OPA1654 G020_SBOS477.gif
Figure 20. Small-Signal Overshoot vs Capacitive Load
OPA1652 OPA1654 G022_SBOS477.png
Figure 22. Open-Loop Gain vs Temperature
OPA1652 OPA1654 G024_SBOS477.png
Figure 24. IB and IOS vs Common-Mode Voltage
OPA1652 OPA1654 G026_SBOS477.png
Figure 26. Supply Current vs Supply Voltage
OPA1652 OPA1654 G028_SBOS477.png
Figure 28. Short-Circuit Current vs Temperature
OPA1652 OPA1654 G032_SBOS477.png
Figure 30. Percent Overshoot vs Capacitive Load
OPA1652 OPA1654 G027_SBOS477.gif
Figure 32. Positive Overload Recovery
OPA1652 OPA1654 G034_SBOS477.gif
Figure 34. No Phase Reversal