SBOS957D February   2022  – December 2023 OPA2328 , OPA328

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information - OPA328
    5. 5.5 Thermal Information - OPA2328
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input and ESD Protection
      2. 6.3.2 Rail-to-Rail Input
      3. 6.3.3 Phase Reversal
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Capacitive Load and Stability
    2. 7.2 Typical Applications
      1. 7.2.1 Bidirectional Current-Sensing
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Transimpedance Amplifier
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 8.1.1.3 DIP-Adapter-EVM
        4. 8.1.1.4 DIYAMP-EVM
        5. 8.1.1.5 Filter Design Tool
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VS = 5.5 V, VCM = VOUT = mid-supply, CL = 20 pF, and RL = 10 kΩ (unless otherwise noted)

GUID-20220314-SS0I-VMF6-ZFRT-XGSZXJ7KCRH7-low.svg
VS = 2.2 V
Figure 5-1 Offset Voltage Production Distribution
GUID-20210823-SS0I-6XXH-MTDN-TWW9BPNG4B5J-low.svg
VS = 2.2 V
Figure 5-3 Offset Voltage vs Common-Mode Voltage
GUID-20220525-SS0I-THLF-MV0X-KQWZHWB4LGHZ-low.svg
 
Figure 5-5 Open-Loop Gain and Phase vs Frequency
GUID-20210823-SS0I-MDVF-HMR3-MVZRX3KQJTXK-low.svg
 
Figure 5-7 Input Bias Current vs Common-Mode Voltage
GUID-20210823-SS0I-DW42-XM81-XQ254K41VHJP-low.svg
 
Figure 5-9 Quiescent Current vs Supply Voltage
GUID-20220314-SS0I-1CMS-TRWD-GNQT6N057GTM-low.svg
 
Figure 5-11 Negative Input Bias Current Distribution
GUID-20210823-SS0I-VBVN-W6CL-5TNZS2ZN7KFJ-low.svg
 
Figure 5-13 PSRR vs Temperature
GUID-20210827-SS0I-SXBT-RGJ9-RS6RG1KHSBBJ-low.svg
 
Figure 5-15 CMRR and PSRR vs Frequency
GUID-20210827-SS0I-BXV7-XSDT-RQGWFQTXKJ70-low.svg
 
Figure 5-17 0.1-Hz to 10-Hz Input Voltage Noise
GUID-20220201-SS0I-FG88-T8C1-KFN2CGQH2DQ3-low.svg
VV+ = 1.1 V, VV– = –1.1 V, current source load
Figure 5-19 Output Voltage Swing vs Output Current
GUID-20220201-SS0I-LHF9-FW71-NLZV8V7TBWFX-low.svg
VV+ = 2.75 V, VV– = –2.75 V, current source load
Figure 5-21 Output Voltage Swing vs Output Current
GUID-20220204-SS0I-B5MT-X2ZK-3CSNWHFZRN5B-low.svg
VV+ = 5.5 V, VV– = 0 V, voltage source load
Figure 5-23 Output Voltage Swing vs Output Current
GUID-20210903-SS0I-F0NZ-92ZS-XGJVS90FGR4C-low.svg
 
Figure 5-25 Open-Loop Gain vs Output to Supply Voltage Delta
GUID-20210827-SS0I-6GZK-1MVQ-SQL54BCMSXH2-low.svg
G = –1
Figure 5-27 Small-Signal Overshoot vs Load Capacitance
GUID-20220201-SS0I-CJQR-X3D1-B4JWTDMFRP6F-low.svg
f = 1 kHz
 
Figure 5-29 THD+N vs Amplitude
GUID-20210827-SS0I-KZLB-QWF4-H0XS0H5QVCNR-low.svg
 
Figure 5-31 Closed-Loop Gain vs Frequency
GUID-20210827-SS0I-CNDM-TVMV-JTCBNJ4RG58G-low.svg
G = +1
Figure 5-33 Small-Signal Step Response
GUID-20210827-SS0I-J2HF-FFF0-BNHBSMCXTSSJ-low.svg
G = +1
Figure 5-35 Large-Signal Step Response
GUID-20220314-SS0I-QQMD-FHK4-LGKNKRTMSK7C-low.svg
 
Figure 5-2 Offset Voltage Production Distribution
GUID-20210823-SS0I-KHJG-93QB-G9JLSWMBJFXS-low.svg
 
Figure 5-4 Offset Voltage vs Common-Mode Voltage
GUID-20210823-SS0I-HW2X-SXT0-TFQ6JRWDNHFW-low.svg
 
Figure 5-6 Open-Loop Gain vs Temperature
GUID-20210823-SS0I-C8B0-TKNN-QGBG1PXXSMBW-low.svg
 
Figure 5-8 Input Bias Current vs Temperature
GUID-20220314-SS0I-C3R1-PH76-SRTK2BGNNKCL-low.svg
 
Figure 5-10 Positive Input Bias Current Distribution
GUID-20220314-SS0I-V0KP-M3QQ-J9F83BRFR0VC-low.svg
 
Figure 5-12 Input Bias Offset Current Distribution
GUID-20210823-SS0I-434H-4SNB-QMZBF7QP6DTM-low.svg
 
 
Figure 5-14 CMRR vs Temperature
GUID-20220525-SS0I-BJFD-VT28-TQTP7JXS3NLZ-low.svg
 
Figure 5-16 Input Voltage Noise Spectral Density vs Frequency
GUID-20210827-SS0I-GRKC-K9Z9-ZCT4JZRNMZPP-low.svg
 
Figure 5-18 Maximum Output Voltage vs Frequency
GUID-20220201-SS0I-PV9D-5BM4-Z4GPXXHP51KL-low.svg
VV+ = 1.1 V, VV– = –1.1 V, current source load
Figure 5-20 Output Voltage Swing vs Output Current
GUID-20220201-SS0I-P2CB-PQXD-39SRHTH4SMPZ-low.svg
VV+ = 2.75 V, VV– = –2.75 V, current source load
Figure 5-22 Output Voltage Swing vs Output Current
GUID-20210827-SS0I-GXNF-TH0J-KNVHSQTHHD41-low.svg
 
Figure 5-24 Open-Loop Output Impedance vs Frequency
GUID-20220201-SS0I-LRZQ-RS9B-QG7GNVWF1HGG-low.svg
 RL = 2 kΩ
Figure 5-26 Open-Loop Gain vs Output to Supply Voltage Delta
GUID-20210827-SS0I-LDSF-TJPV-T4T4XVF3B98Q-low.svg
G = +1
Figure 5-28 Small-Signal Overshoot vs Load Capacitance
GUID-20220201-SS0I-DVQZ-V3NL-WQ8QX6MSWJMC-low.svg
VOUT = 1 VRMS
Figure 5-30 THD+N vs Frequency
GUID-20210827-SS0I-R8SZ-ZB4T-PJ7FSZMR45MV-low.svg
G = –1
Figure 5-32 Small-Signal Step Response
GUID-20210827-SS0I-12DV-N0MN-Z6BPWP20R1Q5-low.svg
G = –1
Figure 5-34 Large-Signal Step Response