SBOS937D October   2020  – December 2023 OPA3S328

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Diagram
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 Switch Characterization Configurations
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low Operating Voltage
      2. 7.3.2 Input and ESD Protection
      3. 7.3.3 Programmable Switches
      4. 7.3.4 Rail-to-Rail Input
      5. 7.3.5 Phase Reversal
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down Mode
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Capacitive Load and Stability
      2. 8.1.2 EMI Susceptibility and Input Filtering
      3. 8.1.3 Transimpedance Amplifier
        1. 8.1.3.1 Optimizing the Transimpedance Circuit
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 TI Reference Designs
        4. 9.1.1.4 Filter Design Tool
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Optimizing the Transimpedance Circuit

To achieve the best performance, select components according to the following guidelines:

  1. For the lowest noise, select RF to create the total required gain. A lower value for RF and adding gain after the transimpedance amplifier generally produces poorer noise performance. The noise produced by RF increases with the square-root of RF; whereas, the signal increases linearly. Therefore, signal-to-noise ratio improves when all the required gain is placed in the transimpedance stage.
  2. Minimize photodiode capacitance and stray capacitance at the summing junction (inverting input). This capacitance causes the op-amp voltage noise to be amplified (increased amplification at high frequency). Use a low-noise voltage source to reverse-bias a photodiode to significantly reduce capacitance. Smaller photodiodes have lower capacitance. Use optics to concentrate light on a small photodiode.
  3. Noise increases with increased bandwidth. Limit the circuit bandwidth to only that required. Use a capacitor across the RF to limit bandwidth, even if not required for stability.
  4. Circuit board leakage can degrade the performance of an otherwise well-designed amplifier. Clean the circuit board carefully. A circuit-board guard trace that encircles the summing junction and is driven at the same voltage helps to control leakage.

For more information, see the Noise Analysis of FET Transimpedance Amplifiers and the Noise Analysis for High-Speed Op Amps application reports.