SBOS233G March   2002  – April 2018 OPA2354 , OPA354 , OPA4354

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions: OPA354
    2.     Pin Functions: OPA2354
    3.     Pin Functions: OPA4354
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA354
    5. 7.5 Thermal Information: OPA2354
    6. 7.6 Thermal Information: OPA4354
    7. 7.7 Electrical Characteristics: VS = 2.7 V to 5.5 V (Single-Supply)
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Rail-to-Rail Input
      3. 8.3.3 Rail-to-Rail Output
      4. 8.3.4 Output Drive
      5. 8.3.5 Video
      6. 8.3.6 Driving Analog-to-Digital converters
      7. 8.3.7 Capacitive Load and Stability
      8. 8.3.8 Wideband Transimpedance Amplifier
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Optimizing the Transimpedance Circuit
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation
    4. 11.4 PowerPAD Thermally-Enhanced Package
    5. 11.5 PowerPAD Assembly Process
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

PowerPAD Assembly Process

The PowerPAD must be connected to the most negative supply voltage for the device, which is ground in single-supply applications and V− in split-supply applications.

Prepare the PCB with a top-side etch pattern, as shown in Figure 41. The exact land design may vary based on the specific assembly process requirements. There must be etch for the leads and etch for the thermal land.

Place the recommended number of plated-through holes (or thermal vias) in the area of the thermal pad. These holes must be 13 mils (.013 in) in diameter. The holes are small so that solder wicking through the holes is not a problem during reflow. TI recommends a minimum of five holes for the 8-pin HSOP PowerPAD package, as shown in Figure 41.

OPA354 OPA2354 OPA4354 ai_powerpad_etch_bos233.gifFigure 41. 8-Pin PowerPAD PCB Etch and Via Pattern

TI recommends, but does not require, placing a small number of additional holes under the package and outside the thermal pad area. These holes provide additional heat paths between the copper thermal land and the ground plane. The holes may be larger because the holes are not in the area to be soldered, so wicking is not a problem. This technique is shown in Figure 41.

Connect all holes, including those within the thermal pad area and outside the pad area, to the internal ground plane or other internal copper plane for single-supply applications, and to V− for split-supply applications.

When laying out these holes, do not use the typical web or spoke via connection methodology, as shown in Figure 42. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This feature makes soldering the vias that have ground plane connections easier. However, in this application, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the PowerPAD package must make connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole.

OPA354 OPA2354 OPA4354 ai_powerpad_via_connex_bos233.gifFigure 42. Via Connection

The top-side solder mask must leave the pad connections and the thermal pad area exposed. The thermal pad area must leave the 13-mil holes exposed. The larger holes outside the thermal pad area may be covered with a solder mask.

Apply solder paste to the exposed thermal pad area and all of the package pins.

With these preparatory steps in place, the PowerPAD device is placed in position and run through the solder reflow operation as any standard surface-mount component. This preparation and processing results in a part that is properly installed.

For detailed information on the PowerPAD package, including thermal modeling considerations and repair procedures, see PowerPAD Thermally Enhanced Package on www.ti.com.