SBOS406G June   2007  – December 2015 OPA2376 , OPA376 , OPA4376

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA376
    5. 6.5 Thermal Information: OPA2376
    6. 6.6 Thermal Information: OPA4376
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Input Offset Voltage and Input Offset Voltage Drift
      3. 7.3.3 Capacitive Load and Stability
      4. 7.3.4 Common-Mode Voltage Range
      5. 7.3.5 Input and ESD Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Amplifier Configurations
      2. 8.1.2 Active Filtering
      3. 8.1.3 Driving an Analog-to-Digital Converter
      4. 8.1.4 Phantom-Powered Microphone
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Detailed Design Procedure
      2. 8.2.2 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Photosensitivity
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI™ (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
        3. 11.1.1.3 WEBENCH® Filter Designer
    2. 11.2 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage Supply, VS = (V+) – (V–) 7 V
Signal input pin(2) (V–) – 0.5 (V+) + 0.5 V
Current Signal input pin(2) –10 10 mA
Output short-circuit(3) Continuous
Temperature Operating range, TA –40 150 °C
Junction, TJ 150
Storage, Tstg –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should be current limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±4000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1000
Machine model ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
(V+) – (V–) Supply voltage 2.2 (±1.1) 5.5 (±2.75) V
TA Operating temperature –40 150 °C

6.4 Thermal Information: OPA376

THERMAL METRIC(1) OPA376 UNIT
DBV (SOT-23) DCK (SC70) D (SOIC)
5 PINS 5 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 273.8 267.0 100.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 126.8 80.9 42.4 °C/W
RθJB Junction-to-board thermal resistance 85.9 54.8 41.0 °C/W
ψJT Junction-to-top characterization parameter 10.9 1.2 4.8 °C/W
ψJB Junction-to-board characterization parameter 84.9 54.1 40.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Thermal Information: OPA2376

THERMAL METRIC(1) OPA2376 UNIT
D (SOIC) DGK (VSSOP) YZD (DSBGA)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 111.1 171.2 119.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 54.7 63.9 0.6 °C/W
RθJB Junction-to-board thermal resistance 51.7 92.8 27.6 °C/W
ψJT Junction-to-top characterization parameter 10.5 9.2 4.0 °C/W
ψJB Junction-to-board characterization parameter 51.2 91.2 27.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W
(1) For more information about traditional and new thermal metrics, see theSemiconductor and IC Package Thermal Metrics application report, SPRA953.

6.6 Thermal Information: OPA4376

THERMAL METRIC(1) OPA4376 UNIT
PW
14 PINS
RθJA Junction-to-ambient thermal resistance 107.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 29.6 °C/W
RθJB Junction-to-board thermal resistance 52.6 °C/W
ψJT Junction-to-top characterization parameter 1.5 °C/W
ψJB Junction-to-board characterization parameter 51.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W

6.7 Electrical Characteristics

At TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage 5 25 μV
dVOS/dT Input offset voltage versus temperature TA = –40°C to +85°C 0.26 1 μV/°C
TA = –40°C to +125°C 0.32 2 μV/°C
PSRR Input offset voltage versus power supply TA = 25°C, VS = 2.2 V to 5.5 V, VCM < (V+) – 1.3 V 5 20 μV/V
TA = –40°C to +125°C,
VS = 2.2 V to 5.5 V, VCM < (V+) – 1.3 V 		5 μV/V
Channel separation, dc (dual, quad) 0.5 mV/V
INPUT BIAS CURRENT
IB Input bias current TA = 25°C 0.2 10 pA
TA = –40°C to +125°C See Typical Characteristics pA
IOS Input offset current 0.2 10 pA
NOISE
Input voltage noise f = 0.1 Hz to 10 Hz 0.8 μVPP
en Input voltage noise density f = 1 kHz 7.5 nV/√Hz
in Input current noise f = 1 kHz 2 fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) – 0.1 (V+) + 0.1 V
CMRR Common-mode rejection ratio (V–) < VCM < (V+) – 1.3 V 76 90 dB
INPUT CAPACITANCE
Differential 6.5 pF
Common-mode 13 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain 50 mV < VO < (V+) – 50 mV, RL = 10 kΩ 120 134 dB
100 mV < VO < (V+) – 100 mV, RL = 2 kΩ 120 126 dB
FREQUENCY RESPONSE CL = 100 pF, VS = 5.5 V
GBW Gain-bandwidth product 5.5 MHz
SR Slew rate G = 1 2 V/μs
tS Settling time To 0.1%, 2-V step , G = 1 1.6 μs
To 0.01%, 2-V step , G = 1 2 μs
Overload recovery time VIN  × gain > VS 0.33 μs
THD+N Total harmonic distortion + noise VO = 1 VRMS, G = 1, f = 1 kHz, RL = 10 kΩ 0.00027%
OUTPUT
Voltage output swing from rail TA = 25°C, RL = 10 kΩ SC70-5, SOT23-5, SO-8, VSSOP-8, and TSSOP-14 packages only 10 20 mV
DSBGA package only 20 30 mV
TA = –40°C to +125°C, RL = 10 kΩ 40 mV
TA = 25°C, RL = 2 kΩ SC70-5, SOT23-5, SO-8, VSSOP-8, and TSSOP-14 packages only 40 50 mV
DSBGA package only 50 60 mV
TA = –40°C to +125°C, RL = 2 kΩ 80 mV
ISC Short-circuit current +30, –50 mA
CLOAD Capacitive load drive See Typical Characteristics
RO Open-loop output impedance 150 Ω
POWER SUPPLY
VS Specified voltage range 2.2 5.5 V
Operating voltage range 2 to 5.5 V
IQ Quiescent current per amplifier TA = 25°C, IO = 0, VS = 5.5 V, VCM < (V+) – 1.3 V 760 950 μA
TA = –40°C to +125°C 1 mA
TEMPERATURE
Specified range –40 125 °C
Operating range –40 150 °C

6.8 Typical Characteristics

At TA = 25°C, VS = 5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted.
OPA376 OPA2376 OPA4376 tc_open_gp-freq_bos406.gif
Figure 1. Open-Loop Gain and Phase vs Frequency
OPA376 OPA2376 OPA4376 tc_open_psrr-tmp_bos406.gif
Figure 3. Open-Loop Gain and Power-Supply Rejection Ratio vs Temperature
OPA376 OPA2376 OPA4376 tc_v_noise_bos406.gif
Figure 5. Input Voltage Noise Spectral Density
OPA376 OPA2376 OPA4376 tc_cmrr-tmp_bos406.gif
Figure 7. Common-Mode Rejection Ratio vs Temperature
OPA376 OPA2376 OPA4376 tc_iq_cur-sv_bos406.gif
Figure 9. Quiescent and Short-Circuit Current vs Supply Voltage
OPA376 OPA2376 OPA4376 tc_ibc-tmp_bos406.gif
Figure 11. Input Bias Current vs Temperature
OPA376 OPA2376 OPA4376 tc_offset_vltg_bos406.gif
Figure 13. Offset Voltage Production Distribution
OPA376 OPA2376 OPA4376 tc_max_out-frq_bos406.gif
Figure 15. Maximum Output Voltage vs Frequency
OPA376 OPA2376 OPA4376 tc_resp_sm_bos406.gif
Figure 17. Small-Signal Pulse Response
OPA376 OPA2376 OPA4376 tc_set_tim-closed_bos406.gif
Figure 19. Settling Time vs Closed-Loop Gain
OPA376 OPA2376 OPA4376 tc_oloop_ro-frq_bos406.gif
Figure 21. Open-Loop Output Resistance vs Frequency
OPA376 OPA2376 OPA4376 tc_ps-cmrr-freq_bos406.gif
Figure 2. Power-Supply and Common-Mode Rejection Ratio vs Frequency
OPA376 OPA2376 OPA4376 tc_input_vr_bos406.gif
Figure 4. 0.1-Hz to 10-Hz Input Voltage Noise
OPA376 OPA2376 OPA4376 tc_hd-freq_bos406.gif
Figure 6. Total Harmonic Distortion + Noise vs Frequency
OPA376 OPA2376 OPA4376 tc_iq-tmp_bos406.gif
Figure 8. Quiescent Current vs Temperature
OPA376 OPA2376 OPA4376 tc_short_cir-tmp_bos406.gif
Figure 10. Short-Circuit Current vs Temperature
OPA376 OPA2376 OPA4376 tc_outv_outc_bos406.gif
Figure 12. Output Voltage vs Output Current
OPA376 OPA2376 OPA4376 tc_offset_vltg_drift_bos406.gif
Figure 14. Offset Voltage Drift Production Distribution (–40°C to 125°C)
OPA376 OPA2376 OPA4376 tc_ss-load_cap_bos406.gif
Figure 16. Small-Signal Overshoot vs Load Capacitance
OPA376 OPA2376 OPA4376 tc_resp_lg_bos406.gif
Figure 18. Large-Signal Pulse Response
OPA376 OPA2376 OPA4376 tc_ch_sep-frq_bos406.gif
Figure 20. Channel Separation vs Frequency