SCPS143G June   2009  – March 2021 PCA9548A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Reset Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 RESET Input
        1. 8.4.1.1 RESET Errata
          1. 8.4.1.1.1 System Impact
          2. 8.4.1.1.2 System Workaround
      2. 8.4.2 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register
      3. 8.6.3 Bus Transactions
        1. 8.6.3.1 Writes
        2. 8.6.3.2 Reads
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2 Detailed Design Procedure

Once all the slaves are assigned to the appropriate slave channels and bus voltages are identified, the pull-up resistors, Rp, for each of the buses need to be selected appropriately. The minimum pull-up resistance is a function of the reference voltage of the specific I2C channel (VDPUX), VOL,(max), and IOL as shown in Equation 1.

Equation 1. GUID-D5260F88-F7B1-4129-8C5F-4C230238E2B1-low.gif

The maximum pull-up resistance is a function of the maximum rise time, tr (300 ns for fast-mode operation, fSCL = 400 kHz) and bus capacitance, Cbis given by Equation 2.

Equation 2. GUID-499C81C1-2732-4A1C-A9D1-FF8E501DAC51-low.gif

The maximum bus capacitance for an I2C bus must not exceed 400 pF for fast-mode operation. The bus capacitance can be approximated by adding the capacitance of the PCA9548A, Cio(OFF), the capacitance of wires, connections, traces, and the capacitance of each individual slave on a given channel. If multiple channels are activated simultaneously, each of the slaves on all channels contribute to total bus capacitance.