SBOS392H August   2007  – August 2019 REF3312 , REF3318 , REF3320 , REF3325 , REF3330 , REF3333

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      REF3312 in a Single-Supply Signal Chain
      2.      Dropout Voltage vs Load Current
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
    1. Table 1. Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Thermal Hysteresis
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Start-Up Time
      2. 9.3.2 Low Temperature Drift
      3. 9.3.3 Power Dissipation
      4. 9.3.4 Noise Performance
    4. 9.4 Device Functional Modes
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 REF3312 in a Bipolar Signal-Chain Configuration
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Op Amp Level-Shift Design
          2. 10.2.1.2.2 Differential Input Attenuator Design
          3. 10.2.1.2.3 Input Filtering
          4. 10.2.1.2.4 Component Selection
            1. 10.2.1.2.4.1 Voltage References
            2. 10.2.1.2.4.2 Op Amp
          5. 10.2.1.2.5 Input Attenuation and Level Shifting
          6. 10.2.1.2.6 Input Filtering
          7. 10.2.1.2.7 Passive Component Tolerances and Materials
        3. 10.2.1.3 Application Curves
          1. 10.2.1.3.1 DC Performance
          2. 10.2.1.3.2 AC Performance
  11. 11Power-Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.1.2.5 Input Attenuation and Level Shifting

For this design, the bipolar ±5-V input must be attenuated and level shifted so the differential voltage is within the input range of ±VREF / 2, or ±0.625 V. The accuracy of the op amp output and ADC input may degrade near the supply rails and VREF voltage, so the output is designed to produce a 0.125 V to 1.125 V output, or ±0.5 V for a ±5 V input. Scaling the output this way also increases the allowable input range to ±6 V, and allows for some underscale and overscale voltage measurement and protection.

Use Equation 12 to scale the ±5-V input to a ±0.5-V differential voltage, as shown in Equation 15.

Equation 15. REF3312 REF3318 REF3320 REF3325 REF3330 REF3333 q_05v_sbos392.gif

where

  • R1 = R4 = 100 kΩ

R1 and R4 dominate the input impedance for this design and are therefore selected to be 100 kΩ. Higher values can be selected to increase the input impedance at the expense of input noise.

With the value for R2 and R3 selected as 20 kΩ, the value for R5 is calculated, as shown in Equation 16:

Equation 16. REF3312 REF3318 REF3320 REF3325 REF3330 REF3333 q_r5_2_sbos392.gif

where

  • R2 = R3 = 20 kΩ

In order for A1– to equal to VREF / 2, R6 must equal R7. Two 47-kΩ resistors are used in order to conserve power without creating an impedance too weak to drive the ADC input.