SNAS809A December   2021  – August 2022 REF35

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Solder Heat Shift
    2. 8.2 Temperature Coefficient
    3. 8.3 Long-Term Stability
    4. 8.4 Thermal Hysteresis
    5. 8.5 Noise Performance
      1. 8.5.1 Low-Frequency (1/f) Noise
      2. 8.5.2 Broadband Noise
    6. 8.6 Power Dissipation
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Supply Voltage
      2. 9.3.2 EN Pin
      3. 9.3.3 NR Pin
    4. 9.4 Device Functional Modes
      1. 9.4.1 Basic Connections
      2. 9.4.2 Start-Up
      3. 9.4.3 Output Transient Behavior
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Negative Reference Voltage
      2. 10.2.2 Precision Power Supply and Reference
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
          1. 10.2.2.2.1 Selection of Reference
          2. 10.2.2.2.2 Input and Output Capacitors
          3. 10.2.2.2.3 Selection of ADC
        3. 10.2.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Low-Frequency (1/f) Noise

Flicker noise, also known as 1/f noise, is a low-frequency noise that affects the device output voltage which can affect precision measurements in ADCs. This noise increases proportionally with output voltage and operating temperature. Noise is measured by filtering the output from 0.1 Hz to 10 Hz. The 1/f noise is an extremely low value, therefore the frequency of interest must be amplified and band-pass filtered. This is done by using a high-pass filter to block the DC voltage. The resulting noise is then amplified by a gain of 1000. The bandpass filter is created by a series of high-pass and low-pass filter that adds additional gain to make it more visible on a oscilloscope as shown in Figure 8-10. Figure 8-11 shows the effect of flicker noise over 10 second for REF35250. Flicker noise must be tested in a Faraday cage enclosure to block environmental noise.

Figure 8-10 Low-Frequency (1/f) Noise Test Setup
Figure 8-11 0.1 Hz to 10 Hz Voltage Noise

Figure 8-12 shows the typical 1/f noise (0.1 Hz to 10 Hz) distribution across various load conditions. REF35 device also offers noise reduction functionality by adding an optional capacitor between NR (pin 5) and ground pins.

Figure 8-13 shows the typical 1/f noise (0.1 Hz to 10 Hz) distribution across REF35 devices with various capacitance between NR pin and GND.

Figure 8-12 0.1 Hz to 10 Hz Noise Distribution vs Load Conditions
Figure 8-13 0.1 Hz to 10 Hz Noise Distribution vs NR Capacitance