SCLS376I June   1997  – March 2015 SN54AHC273 , SN74AHC273

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematics
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements, VCC = 3.3 V ± 0.3 V
    7. 7.7  Timing Requirements, VCC = 5 V ± 0.5 V
    8. 7.8  Switching Characteristics, VCC = 3.3 V ± 0.3 V
    9. 7.9  Switching Characteristics, VCC = 5 V ± 0.5 V
    10. 7.10 Noise Characteristics
    11. 7.11 Operating Characteristics
    12. 7.12 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • W|20
  • J|20
  • FK|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Operating Range 2-V to 5.5-V VCC
  • Contain Eight Flip-Flops With Single-Rail Outputs
  • Direct Clear Input
  • Individual Data Input to Each Flip-Flop
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)
  • On Products Compliant to MIL-PRF-38535,
    All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

2 Applications

  • Buffers and Storage Registers
  • Shift Registers
  • Pattern Generators
  • Servers
  • PCs and Notebooks
  • Network Switches
  • Memory Systems
  • Databases

3 Description

These devices are positive-edge-triggered D-type
flip-flops with a direct clear (CLR) input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SNx4AHC273 PDIP (20) 24.33 mm × 6.35 mm
SSOP (20) 7.20 mm × 5.30 mm
TSSOP (20) 6.50 mm × 4.40 mm
TVSOP (20) 5.00 mm × 4.40 mm
SOIC (20) 12.80 mm × 7.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

4 Simplified Schematics

SN54AHC273 SN74AHC273 ld1_cls376.gif
 
SN54AHC273 SN74AHC273 ld2_cls376.gif