SLLS145D October   1990  – October 2023 SN65175 , SN75175

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Dissipation Rating
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The SN65175 and SN75175 are monolithic quadruple differential line receivers with 3-state outputs. They are designed to meet the requirements of ANSI Standards EIA/TIA-422-B, RS-423-B, and RS-485, and several ITU recommendations. These standards are for balanced multipoint bus transmission at rates up to 10 megabits per second. Each of the two pairs of receivers has a common active-high enable.

The receivers feature high input impedance, input hysteresis for increased noise immunity, and input sensitivity of ±200 mV over a common-mode input voltage range of ±12 V. The SN65175 and SN75175 are designed for optimum performance when used with the SN75172 or SN75174 quadruple differential line drivers.

The SN65175 is characterized for operation from −40°C to 85°C. The SN75175 is characterized for operation from 0°C to 70°C.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
SN65175 D (SOIC, 16) 9.9 mm × 6 mm
SN75175 N (PDIP, 16) 19.3 mm × 9.4 mm
D (SOIC, 16) 9.9 mm × 6 mm
NS (SOP, 16) 10.2 mm × 7.8 mm
For all more information, see Section 11.
The package size (length × width) is a nominal value and includes pins, where applicable.


GUID-72ADC1B4-95E6-4B7D-969E-11B3F4667E4D-low.pngLogic Symbol (1)
GUID-51E4731A-BB97-44DB-B402-265E5A197955-low.pngLogic Diagram (Positive Logic)
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.