SLLS889C June   2008  – August 2016 SN65HVD1040A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Power Dissipation Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Operating Modes
        1. 9.3.1.1 Bus States by Mode
        2. 9.3.1.2 Normal Mode
        3. 9.3.1.3 Standby Mode and RXD Wake-Up Request
      2. 9.3.2 Protection Features
        1. 9.3.2.1 TXD Dominant State Time-Out
        2. 9.3.2.2 Thermal Shutdown
        3. 9.3.2.3 Undervoltage Lockout and Unpowered Device
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Using With 3.3-V Microcontrollers
      2. 10.1.2 Using SPLIT With Split Termination
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Bus Loading, Length, and Number of Nodes
        2. 10.2.1.2 CAN Termination
        3. 10.2.1.3 Loop Propagation Delay
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Transient Voltage Suppresser (TVS) Diodes
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 ESD Protection
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Community Resource
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Test Guidance With the Following:
    • Device Temperature Grade 0: –40°C to +150°C Ambient Operating Temperature
    • Device HBM ESD Classification Level:
      • 3A Level for All Pins Except 5, 6, and 7
      • 3B Level for Pins 5, 6 and 7
    • Device CDM ESD Classification Level C6
    • Device MM ESD Classification Level M3
  • Improved Drop-In Replacement for TJA1040
  • Meets or Exceeds the Requirements of ISO 11898-5
  • GIFT/ICT Compliant
  • ESD Protection up to ±12 kV (Human-Body Model) on Bus Pins
  • Low-Current Standby Mode With Bus Wake-Up, <12 μA Maximum
  • High Electromagnetic Compliance (EMC)
  • Bus-Fault Protection of –27 V to 40 V
  • Dominant Time-Out Function
  • Thermal Shutdown Protection
  • SPLIT Voltage Source for Common-Mode Stabilization of Bus Through Split Termination
  • Digital Inputs Compatible With 3.3-V and 5-V Microprocessors.
  • Power-Up and Power-Down Glitch-Free Bus Inputs and Outputs
    • High Input Impedance With Low VCC
    • Monotonic Outputs During Power Cycling

2 Applications

  • GMW3122 Dual-Wire CAN Physical Layers
  • SAE J2284 High-Speed CAN for Automotive Applications
  • SAE J1939 Standard Data Bus Interface
  • ISO 11783 Standard Data Bus Interface
  • NMEA 2000 Standard Data Bus Interface

3 Description

The SN65HVD1040A device meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a Controller Area Network (CAN). The device is qualified for use in automotive applications.

As a CAN transceiver, this device provides differential transmit capability to the bus and differential receive capability to a CAN controller at signaling rates up to 1 megabit per second (Mbps) (1)

(1)The signaling rate of a line is the number of voltage transitions that are made per second, expressed in the units bps (bits per second).

Device Information (a)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN65HVD1040A-Q1 SOIC (8) 4.90 mm × 3.91 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Functional Block Diagram

SN65HVD1040A-Q1 block_diag_slls995.gif