SLLSES4A September   2016  – November 2016 SN65HVD233-Q1 , SN65HVD234-Q1 , SN65HVD235-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics: Driver
    6. 8.6  Electrical Characteristics: Receiver
    7. 8.7  Switching Characteristics: Driver
    8. 8.8  Switching Characteristics: Receiver
    9. 8.9  Switching Characteristics: Device
    10. 8.10 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagrams
    3. 10.3 Feature Description
      1. 10.3.1 Diagnostic Loopback (SN65HVD233-Q1)
      2. 10.3.2 Autobaud Loopback (SN65HVD235-Q1)
      3. 10.3.3 Slope Control
      4. 10.3.4 Standby
      5. 10.3.5 Thermal Shutdown
    4. 10.4 Device Functional Modes
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 Bus Loading, Length and Number of Nodes
        2. 11.2.1.2 CAN Termination
      2. 11.2.2 Detailed Design Procedure
      3. 11.2.3 Application Curve
    3. 11.3 System Example
      1. 11.3.1 ISO 11898 Compliance of SN65HVD23x-Q1 Family of 3.3-V CAN Transceivers
        1. 11.3.1.1 Introduction
        2. 11.3.1.2 Differential Signal
        3. 11.3.1.3 Common-Mode Signal
        4. 11.3.1.4 Interoperability of 3.3-V CAN in 5-V CAN Systems
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Related Links
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 Community Resources
    4. 14.4 Trademarks
    5. 14.5 Electrostatic Discharge Caution
    6. 14.6 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Description (continued)

Modes: The RS pin (pin 8) of the SN65HVD233-Q1, SN65HVD234-Q1, and SN65HVD235-Q1 devices provides three modes of operation: high-speed, slope control, and low-power standby mode. The high-speed mode of operation is selected by connecting pin 8 directly to ground, allowing the driver output transistors to switch on and off as fast as possible with no limitation on the rise and fall slope. The rise and fall slope can be adjusted by connecting a resistor between the RS pin and ground. The slope is proportional to the output current of the pin. With a resistor value of 10 kΩ the device driver has a slew rate of approximately 15 V/μs, and with a value of 100 kΩ the device has a slew rate of approximately 2 V/μs. For more information about slope control, see Feature Description.

The SN65HVD233-Q1, SN65HVD234-Q1, and SN65HVD235-Q1 devices enter a low-current standby (listen-only) mode during which the driver is switched off and the receiver remains active if a high logic level is applied to the RS pin. If the local protocol controller must transmit a message to the bus, it must return also the device to either high-speed mode or slope-control mode via the RS pin.

Loopback (SN65HVD233-Q1): A logic high on the loopback (LBK) pin (pin 5) of the SN65HVD233-Q1 device places the bus output and bus input in a high-impedance state. Internally, the TXD-to-RS path of the device remains active and available for driver-to-receiver loopback that can be used for self-diagnostic node functions without disturbing the bus. For more information on the loopback mode, see Feature Description.

Ultralow-Current Sleep (SN65HVD234-Q1): The SN65HVD234-Q1 device enters an ultralow-current sleep mode in which both the driver and receiver circuits are deactivated if a low logic level is applied to EN pin (pin 5). The device remains in this sleep mode until the circuit is reactivated by applying a high logic level to pin 5.

Autobaud Loopback (SN65HVD235-Q1): The AB pin (pin 5) of the SN65HVD235-Q1 device implements a bus listen-only loopback feature which allows the local node controller to synchronize its baud rate with that of the CAN bus. In autobaud mode, the bus output of the driver is placed in a high-impedance state while the bus input of the receiver remains active. There is an internal TXD pin to RS pin loopback to assist the controller in baud rate detection, or the autobaud function. For more information on the autobaud mode, see Feature Description.