SLLS665M September   2005  – February 2023 SN65HVD30 , SN65HVD31 , SN65HVD32 , SN65HVD33 , SN65HVD34 , SN65HVD35

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
    1.     6
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Driver
    6. 7.6  Electrical Characteristics: Receiver
    7. 7.7  Device Power Dissipation – PD
    8. 7.8  Supply Current Characteristics
    9. 7.9  Switching Characteristics: Driver
    10. 7.10 Switching Characteristics: Receiver
    11. 7.11 Dissipation Ratings
    12. 7.12 Typical Characteristics
      1.      Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low-Power Standby Mode
      2. 8.3.2 Driver Output Current Limiting
      3. 8.3.3 Hot-Plugging
      4. 8.3.4 Receiver Failsafe
      5. 8.3.5 Safe Operation With Bus Contention
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.9 Switching Characteristics: Driver

over recommended operating conditions unless otherwise noted
PARAMETERTEST CONDITIONSMINTYP(1)MAXUNIT
tPLHPropagation delay time, low-to-high-level outputSN65HVD30, SN65HVD33RL = 54 Ω, CL = 50 pF,
See Figure 8-6		41018ns
SN65HVD31, SN65HVD34253865
SN65HVD32, SN65HVD35120175305
tPHLPropagation delay time, high-to-low-level outputSN65HVD30, SN65HVD334918ns
SN65HVD31, SN65HVD34253865
SN65HVD32, SN65HVD35120175305
trDifferential output signal rise timeSN65HVD30, SN65HVD332.5512ns
SN65HVD31, SN65HVD34203760
SN65HVD32, SN65HVD35120185300
tfDifferential output signal fall timeSN65HVD30, SN65HVD332.5512ns
SN65HVD31, SN65HVD34203560
SN65HVD32, SN65HVD35120180300
tsk(p)Pulse skew (|tPHL – tPLH|)SN65HVD30, SN65HVD330.6ns
SN65HVD31, SN65HVD342.0
SN65HVD32, SN65HVD355.1
tPZH1Propagation delay time, high-impedance-to-high-level outputSN65HVD33RL = 110 Ω, RE at 0 V,
D = 3 V and S1 = Y, or
D = 0 V and S1 = Z
See Figure 8-7		45ns
SN65HVD34235
SN65HVD35490
tPHZPropagation delay time, high-level-to-high-impedance outputSN65HVD3325ns
SN65HVD3465
SN65HVD35165
tPZL1Propagation delay time, high-impedance-to-low-level outputSN65HVD33RL = 110 Ω, RE at 0 V,
D = 3 V and S1 = Z, or
D = 0 V and S1 = Y
See Figure 8-8		35ns
SN65HVD34190
SN65HVD35490
tPLZPropagation delay time, low-level-to-high-impedance outputSN65HVD3330ns
SN65HVD34120
SN65HVD35290
tPZH1,
tPZL1		Driver enable delay with bus voltage offsetVO= 2 V (Typ)500900ns
tPZH2Propagation delay time, standby-to-high-level outputRL = 110 Ω, RE at 3 V,
D = 3 V and S1 = Y, or
D = 0 V and S1 = Z
See Figure 8-7		4000ns
tPZL2Propagation delay time, standby-to-low-level outputRL = 110 Ω, RE at 3 V,
D = 3 V and S1 = Z, or
D = 0 V and S1 = Y
See Figure 8-8		4000ns
(1) All typical values are at 25°C and with a 3.3-V supply.