SCAS515G June   1995  – March 2024 SN54ACT240 , SN74ACT240

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
    6. 5.6 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
    4. 7.4 Device Functional Modes
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|20
  • RKS|20
  • NS|20
  • N|20
  • DGS|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SN74ACT240 N (PDIP, 20) 24.33mm × 9.4mm 24.33mm × 6.35mm
DGS (VSSOP, 20) 5.1mm × 4.9mm 5.1mm × 3mm
DW (SOIC, 20) 12.8mm × 10.3mm 12.80mm × 7.50mm
NS (SOP, 20) 12.6mm × 7.8mm 12.6mm × 5.3mm
DB (SSOP, 20) 7.2mm × 7.8mm 7.2mm × 5.3mm
PW (TSSOP, 20) 6.5mm × 6.4mm 6.5mm × 4.4mm
RKS (VQFN, 20) 4.5mm × 2.5mm 4.5mm × 2.5mm
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.

GUID-AC8F4CBD-75FD-4BBF-AF1C-651C93F60375-low.png
Logic Diagram (Positive Logic)