SCLS345K May   1996  – April 2024 SN54AHC157 , SN74AHC157

PRODUCTION DATA  

  1.   1
  2. Features
  3. Description
  4. Pin Configuration and Functions
  5. Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Thermal Information
    5. 4.5  Electrical Characteristics
    6. 4.6  Switching Characteristics, VCC = 3.3V ± 0.3V
    7. 4.7  Switching Characteristics, VCC = 5V ± 0.5V
    8. 4.8  Noise Characteristics
    9. 4.9  Operating Characteristics
    10. 4.10 Typical Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Links
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|16
  • PW|16
  • NS|16
  • N|16
  • RGY|16
  • D|16
  • DGV|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

These quadruple 2-line to 1-line data selectors/multiplexers are designed for 2V to 5.5V VCC operation.

The SNx4AHC157 devices feature a common strobe (G) input. When the strobe is high, all outputs are low. When the strobe is low, a 4-bit word is selected from one of two sources and is routed to the four outputs. The devices provide true data.

Device Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SNx4AHC157 D (SOIC, 16) 9.90 mm × 6mm 9.90 mm × 3.90 mm
DB (SSOP, 16) 6.20 mm × 7.8mm 6.20 mm × 5.30 mm
N (PDIP, 16) 19.31 mm × 9.4mm 19.31 mm × 6.35 mm
NS (SOP, 16) 5mm × 6.4mm 5mm × 4.4mm
PW (TSSOP, 16) 5.00 mm × 6.4mm 5.00 mm × 4.40 mm
DGV (TVSOP, 16) 3.6mm × 6.4mm 3.6mm × 4.4mm
RGY (VQFN, 16) 4mm × 3.5mm 4mm × 3.5mm
For more information, see Section 10.
The package size (length × width) is a nominal value and includes pins, where applicable.
The body size (length × width) is a nominal value and does not include pins.
GUID-51FB48E3-AFD2-4EE3-8F17-736EDDDE4067-low.gif
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.
Logic Diagram (Positive Logic)