SCDS143C October   2003  – June  2015 SN74CB3Q3125


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBQ|16
  • RGY|14
  • DGV|14
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

The SN74CB3Q3125 device is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The SN74CB3Q3125 device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3125 device provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3125 device is organized as four 1-bit bus switches with separate output-enable (1OE, 2OE, 3OE, 4OE) inputs. It can be used as four 1-bit bus switches or as one 4-bit bus switch. When OE is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

SN74CB3Q3125 sch_scds135.gifFigure 4. Simplified Schematic, Each FET Switch (SW)

8.2 Functional Block Diagram

SN74CB3Q3125 ld_cds143.gif

8.3 Feature Description

The SN74CB3Q3125 device has a high-bandwidth data path (up to 500 MHz) and has 5-V tolerant I/Os with the device powered up or powered down. It also has low and flat ON-state resistance (ron) characteristics over operating range (ron = 4-Ω Typ).

The SN74CB3Q3125 device has rail-to-rail switching on data I/O ports for 0-V to 5-V switching with
3.3-V VCCand 0-V to 3.3-V switching with 2.5-V VCC as well as bidirectional data flow with near-zero propagation delay and low input/output capacitance that minimizes loading and signal distortion (Cio(OFF) = 3.5-pF Typ).

The SN74CB3Q3125 device also provides a fast switching frequency (fOE = 20-MHz Max) with data and control inputs that provide undershoot clamp diodes as well as low power consumption (ICC = 0.6-mA Typ).

The VCC operating range is from 2.3 V to 3.6 V and the data I/Os support 0-V to 5-V signal levels of
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V).

The control inputs can be driven by TTL or 5-V or 3.3-V CMOS outputs, and Ioff supports partial-power-down mode operation.

8.4 Device Functional Modes

Table 1 lists the functional modes for the SN74CB3Q3125 device.

Table 1. Function Table

L B A port = B port
H Z Disconnect