SCLS428I May   1999  – September  2015 SN74LV4051A

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Operating Characteristics
    7. 6.7  Switching Characteristics: VCC = 2.5 V ± 0.2 V
    8. 6.8  Switching Characteristics: VCC = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics: VCC = 5 V ± 0.5 V
    10. 6.10 Analog Switch Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|16
  • PW|16
  • NS|16
  • N|16
  • RGY|16
  • D|16
  • DGV|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 2-V to 5.5-V VCC Operation
  • Support Mixed-Mode Voltage Operation on
    All Ports
  • High On-Off Output-Voltage Ratio
  • Low Crosstalk Between Switches
  • Individual Switch Controls
  • Extremely Low Input Current
  • Latch-Up Performance Exceeds 100-mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

2 Applications

  • Telecommunications
  • eCall
  • Infotainment

3 Description

The SN74LV4051A 8-channel CMOS analog multiplexers and demultiplexers are designed for 2-V to 5.5-V VCC operation.

The SN74LV4051A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5-V (peak) to be transmitted in either direction.

Applications include: signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LV4051A TSSOP (16) 5.00 mm × 6.30 mm
SOIC (16) 9.90 mm × 6.00 mm
SSOP (16) 6.20 mm × 7.80 mm
TVSOP (16) 3.60 mm × 6.40 mm
PDIP (16) 19.30 mm × 6.35 mm
SO (16) 3.60 mm × 6.40 mm
VQFN (16) 3.50 mm × 4.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram (Positive Logic)

SN74LV4051A ld_cls520.gif