SCAS290Q January 1993 – January 2015 SN74LVC125A
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC125A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
|PART NUMBER||PACKAGE (PIN)||BODY SIZE|
|SN74LVC125A||SOIC (14)||8.65 mm × 3.91 mm|
|SSOP (14)||6.20 mm × 5.30 mm|
|SOP (14)||10.30 mm × 5.30 mm|
|TSSOP (14)||5.00 mm × 4.40 mm|
|VQFN (14)||3.50 mm × 3.50 mm|