SCES885A
April 2017 – August 2026
SN74LVC1G80-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements: TA = –40°C to +85°C
5.7
Timing Requirements: TA = –40°C to +125°C
5.8
Switching Characteristics: TA = –40°C to +85°C, CL = 15pF
5.9
Switching Characteristics: TA = –40°C to +85°C, CL = 30pF or 50pF
5.10
Switching Characteristics: TA = –40°C to +125°C, CL = 30pF or 50pF
5.11
Operating Characteristics
5.12
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Balanced High-Drive CMOS Push-Pull Outputs
7.3.2
Standard CMOS Inputs
7.3.3
Clamp Diodes
7.3.4
Partial Power Down (Ioff)
7.3.5
Over-Voltage Tolerant Inputs
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DCK|5
MPDS025K
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sces885a_oa
sces885a_pm
8.2.3
Application Curve
Figure 8-2
Frequency Division