SLASEI6A October   2019  – December 2019 TAS2564

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 TDM Port Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  PurePath™ Console 3 Software
      2. 8.3.2  Device Mode and Address Selection
      3. 8.3.3  General I2C Operation
      4. 8.3.4  Single-Byte and Multiple-Byte Transfers
      5. 8.3.5  Single-Byte Write
      6. 8.3.6  Multiple-Byte Write and Incremental Multiple-Byte Write
      7. 8.3.7  Single-Byte Read
      8. 8.3.8  Multiple-Byte Read
      9. 8.3.9  Register Organization
      10. 8.3.10 Operational Modes
        1. 8.3.10.1 Hardware Shutdown
        2. 8.3.10.2 Software Shutdown
        3. 8.3.10.3 Mute
        4. 8.3.10.4 Active
        5. 8.3.10.5 Perform Load Diagnostics
        6. 8.3.10.6 Mode Control and Software Reset
      11. 8.3.11 Faults and Status
      12. 8.3.12 Power Sequencing Requirements
      13. 8.3.13 Digital Input Pull Downs
    4. 8.4 Device Functional Modes
      1. 8.4.1  TDM Port
      2. 8.4.2  Playback Signal Path
        1. 8.4.2.1 High Pass Filter
        2. 8.4.2.2 Digital Volume Control and Amplifier Output Level
        3. 8.4.2.3 Auto-Mute During Idle Channel Mode
        4. 8.4.2.4 Auto-Start/Stop on Audio Clocks
        5. 8.4.2.5 Supply Tracking Limiters with Brown Out Prevention
        6. 8.4.2.6 Inter Chip Limiter Alignment
          1. 8.4.2.6.1 TDM Mode
        7. 8.4.2.7 Class-D Settings
      3. 8.4.3  SAR ADC
      4. 8.4.4  Boost
      5. 8.4.5  IV Sense
      6. 8.4.6  DC Detect
      7. 8.4.7  Load Diagnostics
      8. 8.4.8  Clocks and PLL
      9. 8.4.9  Thermal Foldback
      10. 8.4.10 Internal Tone Generator
    5. 8.5 Register Maps
      1. 8.5.1   Register Summary Table Page=0x00
      2. 8.5.2   Register Summary Table Page=0x01
      3. 8.5.3   Register Summary Table Page=0x02
      4. 8.5.4   Register Summary Table Page=0x03
      5. 8.5.5   Register Summary Table Page=0x04
      6. 8.5.6   PAGE0 (page=0x00 address=0x00) [reset=0h]
        1. Table 116. Device Page Field Descriptions
      7. 8.5.7   SW_RESET (page=0x00 address=0x01) [reset=1h]
        1. Table 117. Software Reset Field Descriptions
      8. 8.5.8   PWR_CTL (page=0x00 address=0x02) [reset=8Eh]
        1. Table 118. Power Control Field Descriptions
      9. 8.5.9   PB_CFG1 (page=0x00 address=0x03) [reset=20h]
        1. Table 119. Playback Configuration 1 Field Descriptions
      10. 8.5.10  MISC_CFG1 (page=0x00 address=0x04) [reset=C6h]
        1. Table 120. Misc Configuration 1 Field Descriptions
      11. 8.5.11  MISC_CFG2 (page=0x00 address=0x05) [reset=22h]
        1. Table 121. Misc Configuration 2 Field Descriptions
      12. 8.5.12  TDM_CFG0 (page=0x00 address=0x06) [reset=9h]
        1. Table 122. TDM Configuration 0 Field Descriptions
      13. 8.5.13  TDM_CFG1 (page=0x00 address=0x07) [reset=2h]
        1. Table 123. TDM Configuration 1 Field Descriptions
      14. 8.5.14  TDM_CFG2 (page=0x00 address=0x08) [reset=Ah]
        1. Table 124. TDM Configuration 2 Field Descriptions
      15. 8.5.15  TDM_CFG3 (page=0x00 address=0x09) [reset=10h]
        1. Table 125. TDM Configuration 3 Field Descriptions
      16. 8.5.16  TDM_CFG4 (page=0x00 address=0x0A) [reset=13h]
        1. Table 126. TDM Configuration 4 Field Descriptions
      17. 8.5.17  TDM_CFG5 (page=0x00 address=0x0B) [reset=2h]
        1. Table 127. TDM Configuration 5 Field Descriptions
      18. 8.5.18  TDM_CFG6 (page=0x00 address=0x0C) [reset=0h]
        1. Table 128. TDM Configuration 6 Field Descriptions
      19. 8.5.19  TDM_CFG7 (page=0x00 address=0x0D) [reset=4h]
        1. Table 129. TDM Configuration 7 Field Descriptions
      20. 8.5.20  TDM_CFG8 (page=0x00 address=0x0E) [reset=5h]
        1. Table 130. TDM Configuration 8 Field Descriptions
      21. 8.5.21  TDM_CFG9 (page=0x00 address=0x0F) [reset=6h]
        1. Table 131. TDM Configuration 9 Field Descriptions
      22. 8.5.22  TDM_CFG10 (page=0x00 address=0x10) [reset=7h]
        1. Table 132. TDM Configuration 10 Field Descriptions
      23. 8.5.23  TDM_DET (page=0x00 address=0x11) [reset=7Fh]
        1. Table 133. TDM Clock detection monitor Field Descriptions
      24. 8.5.24  LIM_CFG_0 (page=0x00 address=0x12) [reset=12h]
        1. Table 134. Limiter Configuration 0 Field Descriptions
      25. 8.5.25  LIM_CFG_1 (page=0x00 address=0x13) [reset=76h]
        1. Table 135. Limiter Configuration 1 Field Descriptions
      26. 8.5.26  BOP_CFG_0 (page=0x00 address=0x14) [reset=1h]
        1. Table 136. Brown Out Prevention 0 Field Descriptions
      27. 8.5.27  BOP_CFG_1 (page=0x00 address=0x15) [reset=2Eh]
        1. Table 137. Brown Out Prevention 1 Field Descriptions
      28. 8.5.28  GAIN_ICLA_CFG0 (page=0x00 address=0x18) [reset=Ch]
        1. Table 138. Inter Chip Limiter Alignment 0 Field Descriptions
      29. 8.5.29  ICLA_CFG1 (page=0x00 address=0x19) [reset=0h]
        1. Table 139. Inter Chip Limiter Alignment 1 Field Descriptions
      30. 8.5.30  INT_MASK0 (page=0x00 address=0x1A) [reset=FCh]
        1. Table 140. Interrupt Mask 0 Field Descriptions
      31. 8.5.31  INT_MASK1 (page=0x00 address=0x1B) [reset=A6h]
        1. Table 141. Interrupt Mask 1 Field Descriptions
      32. 8.5.32  INT_MASK6 (page=0x00 address=0x1E) [reset=80h]
        1. Table 142. Interrupt Mask 6- Interrupt masks. Field Descriptions
      33. 8.5.33  INT_LTCH0 (page=0x00 address=0x24) [reset=0h]
        1. Table 143. Latched Interrupt Readback 0 Field Descriptions
      34. 8.5.34  INT_LTCH1 (page=0x00 address=0x25) [reset=0h]
        1. Table 144. Latched Interrupt Readback 1 Field Descriptions
      35. 8.5.35  INT_LTCH6 (page=0x00 address=0x28) [reset=0h]
        1. Table 145. Latched Interrupt Readback 6 Field Descriptions
      36. 8.5.36  VBAT_MSB (page=0x00 address=0x2A) [reset=0h]
        1. Table 146. SAR ADC Conversion 0 Field Descriptions
      37. 8.5.37  VBAT_LSB (page=0x00 address=0x2B) [reset=0h]
        1. Table 147. SAR ADC Conversion 1 Field Descriptions
      38. 8.5.38  TEMP (page=0x00 address=0x2C) [reset=0h]
        1. Table 148. SAR ADC Conversion 2 Field Descriptions
      39. 8.5.39  INT_CLK (page=0x00 address=0x30) [reset=19h]
        1. Table 149. Interrupt and Clock Error Field Descriptions
      40. 8.5.40  DIN_PD (page=0x00 address=0x31) [reset=40h]
        1. Table 150. Digital Input Pin Pull Down Field Descriptions
      41. 8.5.41  MISC_CFG3 (page=0x00 address=0x32) [reset=80h]
        1. Table 151. Misc Configuration 3 Field Descriptions
      42. 8.5.42  BOOST_CFG1 (page=0x00 address=0x33) [reset=34h]
        1. Table 152. Boost Configure 1 Field Descriptions
      43. 8.5.43  BOOST_CFG2 (page=0x00 address=0x34) [reset=40h]
        1. Table 153. Boost Configure 2 Field Descriptions
      44. 8.5.44  BOOST_CFG3 (page=0x00 address=0x35) [reset=78h]
        1. Table 154. Boost Configure 3 Field Descriptions
      45. 8.5.45  MISC_CFG4 (page=0x00 address=0x3D) [reset=8h]
        1. Table 155. Misc Configuration 4 Field Descriptions
      46. 8.5.46  TG_CFG0 (page=0x00 address=0x3F) [reset=0h]
        1. Table 156. Tone Generator Field Descriptions
      47. 8.5.47  BOOST_CFG4 (page=0x00 address=0x40) [reset=79h]
        1. Table 157. Boost Configure 4 Field Descriptions
      48. 8.5.48  TDM_CFG11 (page=0x00 address=0x41) [reset=48h]
        1. Table 158. TDM Configuration 11 Field Descriptions
      49. 8.5.49  IO_DRV1 (page=0x00 address=0x42) [reset=0h]
        1. Table 159. PAD drain strength control 1 Field Descriptions
      50. 8.5.50  IO_DRV2 (page=0x00 address=0x43) [reset=0h]
        1. Table 160. PAD drain strength control 2 Field Descriptions
      51. 8.5.51  IO_DRV3 (page=0x00 address=0x44) [reset=0h]
        1. Table 161. PAD drain strength control 3 Field Descriptions
      52. 8.5.52  MISC_CFG5 (page=0x00 address=0x48) [reset=A0h]
        1. Table 162. Boost and Class-D Settings Field Descriptions
      53. 8.5.53  REV_ID (page=0x00 address=0x7D) [reset=0h]
        1. Table 163. Revision and PG ID Field Descriptions
      54. 8.5.54  I2C_CKSUM (page=0x00 address=0x7E) [reset=0h]
        1. Table 164. I2C Checksum Field Descriptions
      55. 8.5.55  BOOK (page=0x00 address=0x7F) [reset=0h]
        1. Table 165. Device Book Field Descriptions
      56. 8.5.56  PAGE1 (page=0x01 address=0x00) [reset=0h]
        1. Table 166. Device Page Field Descriptions
      57. 8.5.57  TF_CFG (page=0x01 address=0x08) [reset=0h]
        1. Table 167. Thermal Folder Configure Field Descriptions
      58. 8.5.58  LDG_CFG2 (page=0x01 address=0x24) [reset=0h]
        1. Table 168. Load Diagnostic 1 Field Descriptions
      59. 8.5.59  PAGE2 (page=0x02 address=0x00) [reset=0h]
        1. Table 169. Device Page Field Descriptions
      60. 8.5.60  DVC_CFG1 (page=0x02 address=0x0C) [reset=40h]
        1. Table 170. Digital Volume Control 1 Field Descriptions
      61. 8.5.61  DVC_CFG2 (page=0x02 address=0x0D) [reset=0h]
        1. Table 171. Digital Volume Control 2 Field Descriptions
      62. 8.5.62  DVC_CFG3 (page=0x02 address=0x0E) [reset=0h]
        1. Table 172. Digital Volume Control 3 Field Descriptions
      63. 8.5.63  DVC_CFG4 (page=0x02 address=0x0F) [reset=0h]
        1. Table 173. Digital Volume Control 4 Field Descriptions
      64. 8.5.64  DVC_CFG5 (page=0x02 address=0x10) [reset=3h]
        1. Table 174. Digital Volume Control 5 Field Descriptions
      65. 8.5.65  DVC_CFG6 (page=0x02 address=0x11) [reset=4Ah]
        1. Table 175. Digital Volume Control 6 Field Descriptions
      66. 8.5.66  DVC_CFG7 (page=0x02 address=0x12) [reset=51h]
        1. Table 176. Digital Volume Control 7 Field Descriptions
      67. 8.5.67  DVC_CFG8 (page=0x02 address=0x13) [reset=6Ch]
        1. Table 177. Digital Volume Control 8 Field Descriptions
      68. 8.5.68  LIM_CFG1 (page=0x02 address=0x14) [reset=2Dh]
        1. Table 178. Limiter Configuration 1 Field Descriptions
      69. 8.5.69  LIM_CFG2 (page=0x02 address=0x15) [reset=6Ah]
        1. Table 179. Limiter Configuration 2- Sets limiter max attenuation Field Descriptions
      70. 8.5.70  LIM_CFG3 (page=0x02 address=0x16) [reset=86h]
        1. Table 180. Limiter Configuration 3- Sets limiter max attenuation Field Descriptions
      71. 8.5.71  LIM_CFG4 (page=0x02 address=0x17) [reset=6Fh]
        1. Table 181. Limiter Configuration 4- Sets limiter max attenuation Field Descriptions
      72. 8.5.72  LIM_CFG5 (page=0x02 address=0x18) [reset=56h]
        1. Table 182. Limiter Configuration 5 Field Descriptions
      73. 8.5.73  LIM_CFG6 (page=0x02 address=0x19) [reset=B7h]
        1. Table 183. Limiter Configuration 6 Field Descriptions
      74. 8.5.74  LIM_CFG7 (page=0x02 address=0x1A) [reset=96h]
        1. Table 184. Limiter Configuration 7 Field Descriptions
      75. 8.5.75  LIM_CFG8 (page=0x02 address=0x1B) [reset=FFh]
        1. Table 185. Limiter Configuration 8 Field Descriptions
      76. 8.5.76  LIM_CFG9 (page=0x02 address=0x1C) [reset=16h]
        1. Table 186. Limiter Configuration 9 Field Descriptions
      77. 8.5.77  LIM_CFG10 (page=0x02 address=0x1D) [reset=66h]
        1. Table 187. Limiter Configuration 10 Field Descriptions
      78. 8.5.78  LIM_CFG11 (page=0x02 address=0x1E) [reset=66h]
        1. Table 188. Limiter Configuration 11 Field Descriptions
      79. 8.5.79  LIM_CFG12 (page=0x02 address=0x1F) [reset=66h]
        1. Table 189. Limiter Configuration 12 Field Descriptions
      80. 8.5.80  LIM_CFG13 (page=0x02 address=0x20) [reset=34h]
        1. Table 190. Limiter Configuration 13 Field Descriptions
      81. 8.5.81  LIM_CFG14 (page=0x02 address=0x21) [reset=CCh]
        1. Table 191. Limiter Configuration 14 Field Descriptions
      82. 8.5.82  LIM_CFG15 (page=0x02 address=0x22) [reset=CCh]
        1. Table 192. Limiter Configuration 15 Field Descriptions
      83. 8.5.83  LIM_CFG16 (page=0x02 address=0x23) [reset=CDh]
        1. Table 193. Limiter Configuration 16 Field Descriptions
      84. 8.5.84  LIM_CFG17 (page=0x02 address=0x24) [reset=10h]
        1. Table 194. Limiter Configuration 1 Field Descriptions
      85. 8.5.85  LIM_CFG18 (page=0x02 address=0x25) [reset=0h]
        1. Table 195. Limiter Configuration 2 Field Descriptions
      86. 8.5.86  LIM_CFG19 (page=0x02 address=0x26) [reset=0h]
        1. Table 196. Limiter Configuration 3 Field Descriptions
      87. 8.5.87  LIM_CFG20 (page=0x02 address=0x27) [reset=0h]
        1. Table 197. Limiter Configuration 4 Field Descriptions
      88. 8.5.88  BOP_CFG1 (page=0x02 address=0x28) [reset=2Eh]
        1. Table 198. Brown Out Prevention 1 Field Descriptions
      89. 8.5.89  BOP_CFG2 (page=0x02 address=0x29) [reset=66h]
        1. Table 199. Brown Out Prevention 2 Field Descriptions
      90. 8.5.90  BOP_CFG3 (page=0x02 address=0x2A) [reset=66h]
        1. Table 200. Brown Out Prevention 3 Field Descriptions
      91. 8.5.91  BOP_CFG4 (page=0x02 address=0x2B) [reset=66h]
        1. Table 201. Brown Out Prevention 4 Field Descriptions
      92. 8.5.92  BOP_CFG5 (page=0x02 address=0x2C) [reset=2Bh]
        1. Table 202. Brown Out Prevention 5 Field Descriptions
      93. 8.5.93  BOP_CFG6 (page=0x02 address=0x2D) [reset=33h]
        1. Table 203. Brown Out Prevention 6 Field Descriptions
      94. 8.5.94  BOP_CFG7 (page=0x02 address=0x2E) [reset=33h]
        1. Table 204. Brown Out Prevention 7 Field Descriptions
      95. 8.5.95  BOP_CFG8 (page=0x02 address=0x2F) [reset=33h]
        1. Table 205. Brown Out Prevention 8 Field Descriptions
      96. 8.5.96  HPFC_CFG1 (page=0x02 address=0x30) [reset=7Fh]
        1. Table 206. HPF Coefficient 1 Field Descriptions
      97. 8.5.97  HPFC_CFG2 (page=0x02 address=0x31) [reset=FBh]
        1. Table 207. HPF Coefficient 2 Field Descriptions
      98. 8.5.98  HPFC_CFG3 (page=0x02 address=0x32) [reset=B6h]
        1. Table 208. HPF Coefficient 3 Field Descriptions
      99. 8.5.99  HPFC_CFG4 (page=0x02 address=0x33) [reset=14h]
        1. Table 209. HPF Coefficient 4 Field Descriptions
      100. 8.5.100 HPFC_CFG5 (page=0x02 address=0x34) [reset=80h]
        1. Table 210. HPF Coefficient 5 Field Descriptions
      101. 8.5.101 HPFC_CFG6 (page=0x02 address=0x35) [reset=4h]
        1. Table 211. HPF Coefficient 6 Field Descriptions
      102. 8.5.102 HPFC_CFG7 (page=0x02 address=0x36) [reset=49h]
        1. Table 212. HPF Coefficient 7 Field Descriptions
      103. 8.5.103 HPFC_CFG8 (page=0x02 address=0x37) [reset=ECh]
        1. Table 213. HPF Coefficient 8 Field Descriptions
      104. 8.5.104 HPFC_CFG9 (page=0x02 address=0x38) [reset=7Fh]
        1. Table 214. HPF Coefficient 9 Field Descriptions
      105. 8.5.105 HPFC_CFG10 (page=0x02 address=0x39) [reset=7Fh]
        1. Table 215. HPF Coefficient 10 Field Descriptions
      106. 8.5.106 HPFC_CFG11 (page=0x02 address=0x3A) [reset=6Ch]
        1. Table 216. HPF Coefficient 11 Field Descriptions
      107. 8.5.107 HPFC_CFG12 (page=0x02 address=0x3B) [reset=28h]
        1. Table 217. HPF Coefficient 12 Field Descriptions
      108. 8.5.108 TG_CFG1 (page=0x02 address=0x3C) [reset=3Fh]
        1. Table 218. Tone Generator 1 Freq Calc 1 Field Descriptions
      109. 8.5.109 TG_CFG2 (page=0x02 address=0x3D) [reset=FFh]
        1. Table 219. Tone Generator 1 Freq Calc 1 Field Descriptions
      110. 8.5.110 TG_CFG3 (page=0x02 address=0x3E) [reset=7Ah]
        1. Table 220. Tone Generator 1 Freq Calc 1 Field Descriptions
      111. 8.5.111 TG_CFG4 (page=0x02 address=0x3F) [reset=E3h]
        1. Table 221. Tone Generator 1 Freq Calc 1 Field Descriptions
      112. 8.5.112 TG_CFG5 (page=0x02 address=0x40) [reset=1h]
        1. Table 222. Tone Generator 1 Freq Calc 2 Field Descriptions
      113. 8.5.113 TG_CFG6 (page=0x02 address=0x41) [reset=1h]
        1. Table 223. Tone Generator 1 Freq Calc 2 Field Descriptions
      114. 8.5.114 TG_CFG7 (page=0x02 address=0x42) [reset=5Bh]
        1. Table 224. Tone Generator 1 Freq Calc 2 Field Descriptions
      115. 8.5.115 TG_CFG8 (page=0x02 address=0x43) [reset=4Ch]
        1. Table 225. Tone Generator 1 Freq Calc 2 Field Descriptions
      116. 8.5.116 TG_CFG9 (page=0x02 address=0x44) [reset=0h]
        1. Table 226. Tone Generator 1 Freq Calc 3 Field Descriptions
      117. 8.5.117 TG_CFG10 (page=0x02 address=0x45) [reset=0h]
        1. Table 227. Tone Generator 1 Freq Calc 3 Field Descriptions
      118. 8.5.118 TG_CFG11 (page=0x02 address=0x46) [reset=3h]
        1. Table 228. Tone Generator 1 Freq Calc 3 Field Descriptions
      119. 8.5.119 TG_CFG12 (page=0x02 address=0x47) [reset=1Fh]
        1. Table 229. Tone Generator 1 Freq Calc 3 Field Descriptions
      120. 8.5.120 TG_CFG13 (page=0x02 address=0x48) [reset=2h]
        1. Table 230. Tone Generator 1 Amplitude Calc Field Descriptions
      121. 8.5.121 TG_CFG14 (page=0x02 address=0x49) [reset=46h]
        1. Table 231. Tone Generator 1 Amplitude Calc Field Descriptions
      122. 8.5.122 TG_CFG15 (page=0x02 address=0x4A) [reset=B4h]
        1. Table 232. Tone Generator 1 Amplitude Calc Field Descriptions
      123. 8.5.123 TG_CFG16 (page=0x02 address=0x4B) [reset=E4h]
        1. Table 233. Tone Generator 1 Amplitude Calc Field Descriptions
      124. 8.5.124 LD_CFG0 (page=0x02 address=0x5C) [reset=2h]
        1. Table 234. Load Diagnostics Resistance Upper Threshold Field Descriptions
      125. 8.5.125 LD_CFG1 (page=0x02 address=0x5D) [reset=80h]
        1. Table 235. Load Diagnostics Resistance Upper Threshold Field Descriptions
      126. 8.5.126 LD_CFG2 (page=0x02 address=0x5E) [reset=0h]
        1. Table 236. Load Diagnostics Resistance Upper Threshold Field Descriptions
      127. 8.5.127 LD_CFG3 (page=0x02 address=0x5F) [reset=0h]
        1. Table 237. Load Diagnostics Resistance Upper Threshold Field Descriptions
      128. 8.5.128 LD_CFG4 (page=0x02 address=0x60) [reset=0h]
        1. Table 238. Load Diagnostics Resistance Lower Threshold Field Descriptions
      129. 8.5.129 LD_CFG5 (page=0x02 address=0x61) [reset=19h]
        1. Table 239. Load Diagnostics Resistance Lower Threshold Field Descriptions
      130. 8.5.130 LD_CFG6 (page=0x02 address=0x62) [reset=99h]
        1. Table 240. Load Diagnostics Resistance Lower Threshold Field Descriptions
      131. 8.5.131 LD_CFG7 (page=0x02 address=0x63) [reset=9Ah]
        1. Table 241. Load Diagnostics Resistance Lower Threshold Field Descriptions
      132. 8.5.132 IDC_CFG0 (page=0x02 address=0x64) [reset=0h]
        1. Table 242. Idle channel detection threshold Field Descriptions
      133. 8.5.133 IDC_CFG1 (page=0x02 address=0x65) [reset=20h]
        1. Table 243. Idle channel detection threshold Field Descriptions
      134. 8.5.134 IDC_CFG2 (page=0x02 address=0x66) [reset=C4h]
        1. Table 244. Idle channel detection threshold Field Descriptions
      135. 8.5.135 IDC_CFG3 (page=0x02 address=0x67) [reset=9Ch]
        1. Table 245. Idle channel detection threshold Field Descriptions
      136. 8.5.136 IDC_CFG4 (page=0x02 address=0x68) [reset=2h]
        1. Table 246. MID Power Threshold Field Descriptions
      137. 8.5.137 IDC_CFG5 (page=0x02 address=0x69) [reset=46h]
        1. Table 247. MID Power Threshold Field Descriptions
      138. 8.5.138 IDC_CFG6 (page=0x02 address=0x6A) [reset=B4h]
        1. Table 248. MID Power Threshold Field Descriptions
      139. 8.5.139 IDC_CFG7 (page=0x02 address=0x6B) [reset=E4h]
        1. Table 249. MID Power Threshold Field Descriptions
      140. 8.5.140 IDC_CFG8 (page=0x02 address=0x6C) [reset=0h]
        1. Table 250. Hystersis for idle channel detection Field Descriptions
      141. 8.5.141 IDC_CFG9 (page=0x02 address=0x6D) [reset=0h]
        1. Table 251. Hystersis for idle channel detection Field Descriptions
      142. 8.5.142 IDC_CFG10 (page=0x02 address=0x6E) [reset=12h]
        1. Table 252. Hystersis for idle channel detection Field Descriptions
      143. 8.5.143 IDC_CFG11 (page=0x02 address=0x6F) [reset=C0h]
        1. Table 253. Hystersis for idle channel detection Field Descriptions
      144. 8.5.144 IVHPFC_CFG1 (page=0x02 address=0x70) [reset=7Fh]
        1. Table 254. IVSENSE HPF N0 coefficient Field Descriptions
      145. 8.5.145 IVHPFC_CFG2 (page=0x02 address=0x71) [reset=FBh]
        1. Table 255. IVSENSE HPF N0 coefficient Field Descriptions
      146. 8.5.146 IVHPFC_CFG3 (page=0x02 address=0x72) [reset=B6h]
        1. Table 256. IVSENSE HPF N0 coefficient Field Descriptions
      147. 8.5.147 IVHPFC_CFG4 (page=0x02 address=0x73) [reset=14h]
        1. Table 257. IVSENSE HPF N0 coefficient Field Descriptions
      148. 8.5.148 IVHPFC_CFG5 (page=0x02 address=0x74) [reset=80h]
        1. Table 258. IVSENSE HPF N1 coefficient Field Descriptions
      149. 8.5.149 IVHPFC_CFG6 (page=0x02 address=0x75) [reset=4h]
        1. Table 259. IVSENSE HPF N1 coefficient Field Descriptions
      150. 8.5.150 IVHPFC_CFG7 (page=0x02 address=0x76) [reset=49h]
        1. Table 260. IVSENSE HPF N1 coefficient Field Descriptions
      151. 8.5.151 IVHPFC_CFG8 (page=0x02 address=0x77) [reset=ECh]
        1. Table 261. IVSENSE HPF N1 coefficient Field Descriptions
      152. 8.5.152 IVHPFC_CFG9 (page=0x02 address=0x78) [reset=7Fh]
        1. Table 262. IVSENSE HPF D1 coefficient Field Descriptions
      153. 8.5.153 IVHPFC_CFG10 (page=0x02 address=0x79) [reset=F7h]
        1. Table 263. IVSENSE HPF D1 coefficient Field Descriptions
      154. 8.5.154 IVHPFC_CFG11 (page=0x02 address=0x7A) [reset=6Ch]
        1. Table 264. IVSENSE HPF D1 coefficient Field Descriptions
      155. 8.5.155 IVHPFC_CFG12 (page=0x02 address=0x7B) [reset=28h]
        1. Table 265. IVSENSE HPF D1 coefficient Field Descriptions
      156. 8.5.156 TF_CFG_1 (page=0x02 address=0x7C) [reset=72h]
        1. Table 266. Thermal foldback limiter slope (in db/C) Field Descriptions
      157. 8.5.157 TF_CFG_2 (page=0x02 address=0x7D) [reset=14h]
        1. Table 267. Thermal foldback limiter slope (in db/C) Field Descriptions
      158. 8.5.158 TF_CFG_3 (page=0x02 address=0x7E) [reset=82h]
        1. Table 268. Thermal foldback limiter slope (in db/C) Field Descriptions
      159. 8.5.159 TF_CFG_4 (page=0x02 address=0x7F) [reset=C0h]
        1. Table 269. Thermal foldback limiter slope (in db/C) Field Descriptions
      160. 8.5.160 PAGE3 (page=0x03 address=0x00) [reset=0h]
        1. Table 270. Device Page Field Descriptions
      161. 8.5.161 DC_DET_THR1 (page=0x03 address=0x1C) [reset=18h]
        1. Table 271. DC detection threshold 1 Field Descriptions
      162. 8.5.162 DC_DET_THR2 (page=0x03 address=0x1D) [reset=2Ah]
        1. Table 272. DC detection threshold 2 Field Descriptions
      163. 8.5.163 DC_DET_THR3 (page=0x03 address=0x1E) [reset=FFh]
        1. Table 273. DC detection threshold 3 Field Descriptions
      164. 8.5.164 DC_DET_THR4 (page=0x03 address=0x1F) [reset=53h]
        1. Table 274. DC detection threshold 4 Field Descriptions
      165. 8.5.165 DC_DET_HYST1 (page=0x03 address=0x20) [reset=0h]
        1. Table 275. DC detection hysteresis time 1 Field Descriptions
      166. 8.5.166 DC_DET_HYST2 (page=0x03 address=0x21) [reset=0h]
        1. Table 276. DC detection hysteresis time 2 Field Descriptions
      167. 8.5.167 DC_DET_HYST3 (page=0x03 address=0x22) [reset=27h]
        1. Table 277. DC detection hysteresis time 3 Field Descriptions
      168. 8.5.168 DC_DET_HYST4 (page=0x03 address=0x23) [reset=10h]
        1. Table 278. DC detection hysteresis time 4 Field Descriptions
      169. 8.5.169 CLS_H_CFG1 (page=0x03 address=0x24) [reset=Ah]
        1. Table 279. ClassH Field Descriptions
      170. 8.5.170 CLS_H_CFG2 (page=0x03 address=0x25) [reset=3Bh]
        1. Table 280. ClassH Field Descriptions
      171. 8.5.171 CLS_H_CFG3 (page=0x03 address=0x26) [reset=C7h]
        1. Table 281. ClassH Field Descriptions
      172. 8.5.172 CLS_H_CFG4 (page=0x03 address=0x27) [reset=DCh]
        1. Table 282. ClassH Field Descriptions
      173. 8.5.173 CLS_H_CFG5 (page=0x03 address=0x28) [reset=0h]
        1. Table 283. ClassH Field Descriptions
      174. 8.5.174 CLS_H_CFG6 (page=0x03 address=0x29) [reset=0h]
        1. Table 284. ClassH Field Descriptions
      175. 8.5.175 CLS_H_CFG7 (page=0x03 address=0x2A) [reset=0h]
        1. Table 285. ClassH Field Descriptions
      176. 8.5.176 CLS_H_CFG8 (page=0x03 address=0x2B) [reset=0h]
        1. Table 286. ClassH Field Descriptions
      177. 8.5.177 CLS_H_CFG9 (page=0x03 address=0x74) [reset=0h]
        1. Table 287. ClassH Minimum boost level in Voltage Field Descriptions
      178. 8.5.178 CLS_H_CFG10 (page=0x03 address=0x75) [reset=0h]
        1. Table 288. ClassH Minimum boost level in Voltage Field Descriptions
      179. 8.5.179 CLS_H_CFG11 (page=0x03 address=0x76) [reset=2h]
        1. Table 289. ClassH Minimum boost level in Voltage Field Descriptions
      180. 8.5.180 CLS_H_CFG12 (page=0x03 address=0x77) [reset=0h]
        1. Table 290. ClassH Minimum boost level in Voltage Field Descriptions
      181. 8.5.181 PAGE4 (page=0x04 address=0x00) [reset=0h]
        1. Table 291. Device Page Field Descriptions
      182. 8.5.182 LD_CFG8 (page=0x04 address=0x18) [reset=0h]
        1. Table 292. Load Resistance Value after load diagnostics is completed Field Descriptions
      183. 8.5.183 LD_CFG9 (page=0x04 address=0x19) [reset=0h]
        1. Table 293. Load Resistance Value after load diagnostics is completed Field Descriptions
      184. 8.5.184 LD_CFG10 (page=0x04 address=0x1A) [reset=0h]
        1. Table 294. Load Resistance Value after load diagnostics is completed Field Descriptions
      185. 8.5.185 LD_CFG11 (page=0x04 address=0x1B) [reset=0h]
        1. Table 295. Load Resistance Value after load diagnostics is completed Field Descriptions
      186. 8.5.186 TF_CFG4 (page=0x04 address=0x58) [reset=0h]
        1. Table 296. Thermal foldback hold count (samples) Field Descriptions
      187. 8.5.187 TF_CFG5 (page=0x04 address=0x59) [reset=0h]
        1. Table 297. Thermal foldback hold count (samples) Field Descriptions
      188. 8.5.188 TF_CFG6 (page=0x04 address=0x5A) [reset=0h]
        1. Table 298. Thermal foldback hold count (samples) Field Descriptions
      189. 8.5.189 TF_CFG7 (page=0x04 address=0x5B) [reset=64h]
        1. Table 299. Thermal foldback hold count (samples) Field Descriptions
      190. 8.5.190 TF_CFG8 (page=0x04 address=0x5C) [reset=40h]
        1. Table 300. Thermal foldback limiter release rate (db/samples) Field Descriptions
      191. 8.5.191 TF_CFG9 (page=0x04 address=0x5D) [reset=BDh]
        1. Table 301. Thermal foldback limiter release rate (db/samples) Field Descriptions
      192. 8.5.192 TF_CFG10 (page=0x04 address=0x5E) [reset=B7h]
        1. Table 302. Thermal foldback limiter release rate (db/samples) Field Descriptions
      193. 8.5.193 TF_CFG11 (page=0x04 address=0x5F) [reset=B0h]
        1. Table 303. Thermal foldback limiter release rate (db/samples) Field Descriptions
      194. 8.5.194 TF_CFG12 (page=0x04 address=0x60) [reset=39h]
        1. Table 304. Thermal foldback limiter temperature threshold Field Descriptions
      195. 8.5.195 TF_CFG13 (page=0x04 address=0x61) [reset=82h]
        1. Table 305. Thermal foldback limiter temperature threshold Field Descriptions
      196. 8.5.196 TF_CFG14 (page=0x04 address=0x62) [reset=60h]
        1. Table 306. Thermal foldback limiter temperature threshold Field Descriptions
      197. 8.5.197 TF_CFG16 (page=0x04 address=0x63) [reset=7Fh]
        1. Table 307. Thermal foldback limiter temperature threshold Field Descriptions
      198. 8.5.198 TF_CFG17 (page=0x04 address=0x64) [reset=2Dh]
        1. Table 308. Thermal foldback max gain reduction (dB) Field Descriptions
      199. 8.5.199 TF_CFG18 (page=0x04 address=0x65) [reset=6Ah]
        1. Table 309. Thermal foldback max gain reduction (dB) Field Descriptions
      200. 8.5.200 TF_CFG19 (page=0x04 address=0x66) [reset=86h]
        1. Table 310. Thermal foldback max gain reduction (dB) Field Descriptions
      201. 8.5.201 TF_CFG20 (page=0x04 address=0x67) [reset=6Fh]
        1. Table 311. Thermal foldback max gain reduction (dB) Field Descriptions
      202. 8.5.202 DVC_SR1 (page=0x04 address=0x6C) [reset=2h]
        1. Table 312. Volume Control slew rate for 16kHz fs Field Descriptions
      203. 8.5.203 DVC_SR2 (page=0x04 address=0x6D) [reset=79h]
        1. Table 313. Volume Control slew rate for 16kHz fs Field Descriptions
      204. 8.5.204 DVC_SR3 (page=0x04 address=0x6E) [reset=CAh]
        1. Table 314. Volume Control slew rate for 16kHz fs Field Descriptions
      205. 8.5.205 DVC_SR4 (page=0x04 address=0x6F) [reset=5Eh]
        1. Table 315. Volume Control slew rate for 16kHz fs Field Descriptions
      206. 8.5.206 CD_CFG1 (page=0x04 address=0x70) [reset=56h]
        1. Table 316. Class D gain Field Descriptions
      207. 8.5.207 CD_CFG2 (page=0x04 address=0x71) [reset=B7h]
        1. Table 317. Class D gain Field Descriptions
      208. 8.5.208 CD_CFG3 (page=0x04 address=0x72) [reset=96h]
        1. Table 318. Class D gain Field Descriptions
      209. 8.5.209 CD_CFG4 (page=0x04 address=0x73) [reset=FFh]
        1. Table 319. Class D gain Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Mono/Stereo Configuration
        2. 9.2.2.2 Boost Converter Passive Devices
        3. 9.2.2.3 EMI Passive Devices
        4. 9.2.2.4 Miscellaneous Passive Devices
  10. 10Power Supply Recommendations
    1. 10.1 Power Supplies
    2. 10.2 Power Supply Sequencing
      1. 10.2.1 Boost Supply Details
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Package Option Addendum
      1. 13.1.1 Packaging Information
        1. 14.1.2 Tape and Reel Information
      2. 13.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TA = 25 °C, VBAT = 3.8 V, (External PVDD = 12 V), VDD = 1.8 V, RL = 8Ω + 33 µH, fin = 1 kHz, SSM, fs = 48 kHz, Gain = 17.5 dBV (External PVDD Gain=18 dBV), SDZ = 1, Thermal Foldback Disabled, Measured filter free with an Audio Precision with a 22 Hz to 20 kHz un-weighted bandwidth (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DIGITAL INPUT
and OUTPUT
VIH High-level digital input logic voltage threshold All digital pins except SDA and SCL 0.65 × VDD V
VIL Low-level digital input logic voltage threshold All digital pins except SDA and SCL 0.35 × VDD V
VIH(I2C) High-level digital input logic voltage threshold SDA and SCL 0.7 × VDD V
VIL(I2C) Low-level digital input logic voltage threshold SDA and SCL 0.3 × VDD V
VOH High-level digital output voltage All digital pins except SDA, SCL and IRQZ; IOH = 2 mA. VDD – 0.45 V V
VOL Low-level digital output voltage All digital pins except SDA, SCL and IRQZ; IOL = –2 mA. 0.45 V
VOL(I2C) Low-level digital output voltage SDA and SCL; IOL(I2C) = –2 mA. 0.2 × VDD V
VOL(IRQZ) Low-level digital output voltage for IRQZ open drain Output IRQZ; IOL(IRQZ) = –2 mA. 0.45 V
IIH Input logic-high leakage for digital inputs All digital pins; Input = VDD. –5 0.1 5 µA
IIL Input logic-low leakage for digital inputs All digital pins; Input = GND. –5 0.1 5 µA
CIN Input capacitance for digital inputs All digital pins 5 pF
RPD Pull down resistance for digital input/IO pins when asserted on SDOUT, SDIN, FSYNC, SBCLK 50 kΩ
AMPLIFIER PERFORMANCE - Internal Boost
Output Voltage for Full-scale digital Input Measured at -6 dB FS input and scaled by 6dB 7.5 Vrms
POUT Maximum Continuous Output Power RL = 32Ω + 33 µH, THD+N = 0.03 %, fin = 1 kHz 1.75 W
RL = 8 Ω + 33 µH, THD+N = 0.03 %, fin = 1 kHz 7 W
System efficiency at POUT = 1 W RL = 8 Ω + 33 µH, fin = 1 kHz 83 %
RL = 8 Ω + 33 µH, fin = 1 kHz, VBAT = 4.2 V 83.5 %
System efficiency at POUT =0.5 W RL = 8 Ω + 33 µH, fin = 1 kHz 85 %
RL = 8 Ω + 33 µH, fin = 1 kHz, VBAT = 4.2 V 85.5 %
System efficiency at 0.1% THD+N power level RL = 8 Ω + 33 µH, POUT = 7W, fin = 1 kHz, 81 %
THD+N Total harmonic distortion + noise POUT = 0.25 W, RL = 32Ω + 33 µH, fin = 1 kHz 0.01 %
POUT = 1 W, RL = 8 Ω + 33 µH, fin = 1 kHz 0.01 %
VN Idle channel noise A-Weighted, 20 Hz - 20 kHz 14.8 µV
FPWM Class-D PWM switching frequency Average frequency in Spread Spectrum Mode, CLASSD_SYNC=0 384 kHz
Fixed Frequency Mode, CLASSD_SYNC=0 384 kHz
Fixed Frequency Mode, CLASSD_SYNC=1, fs = 44.1, 88.2, 174.6 kHz 352.8 kHz
Fixed Frequency Mode, CLASSD_SYNC=1, fs = 48, 96, 192 kHz 384 kHz
VOS Output offset voltage -1.2 1.2 mV
DNR Dynamic range A-Weighted, -60 dBFS Method 110 dB
SNR Signal to noise ratio A-Weighted, Referenced to 1 % THD+N Output Level 110 dB
KCP Click and pop performance Into and out of Mute, Shutdown, Power Up, Power Down and audio clocks starting and stopping. Measured with APx Plugin. 3.4 mV
Programmable digital gain range 0 23 dBV
Programmable digital gain step size 0.5 dB
AVERROR Amplifier gain error POUT = 1 W ±0.1 dB
Mute attenuation Device in Shutdown or Muted in Normal Operation 110 dB
VBAT power-supply rejection ratio VBAT = 3.8 V + 200 mVpp, fripple = 217 Hz 108 dB
VBAT = 3.8 V + 200 mVpp, fripple = 20 kHz 90 dB
AVDD power-supply rejection ratio VDD = 1.8 V + 200 mVpp, fripple = 217 Hz 98 dB
VDD = 1.8 V + 200 mVpp, fripple = 20 kHz 93 dB
Turn on time from release of SW shutdown No Volume Ramping 1.8 ms
Volume Ramping 4.5 ms
Turn off time from assertion of SW shutdown to amp Hi-Z No Volume Ramping 0.75 ms
Volume Ramping 12.5 ms
AMPLIFIER PERFORMANCE - Receiver Mode
Output Voltage for Full-scale digital Input Measured at -6 dB FS input and scaled by 6dB 2 Vrms
POUT Maximum Continuous Output Power RL = 32Ω + 33 µH, THD+N = 0.03 %, fin = 1 kHz 124.4 mW
RL = 8 Ω + 33 µH, THD+N = 0.03 %, fin = 1 kHz 0.45 W
System efficiency at POUT = 100 mW RL = 8 Ω + 33 µH, fin = 1 kHz 63.5 %
RL = 8 Ω + 33 µH, fin = 1 kHz, VBAT = 4.2 V 65.5 %
System efficiency at POUT =0.45 W RL = 8 Ω + 33 µH, fin = 1 kHz 84.5 %
RL = 8 Ω + 33 µH, fin = 1 kHz, VBAT = 4.2 V 85 %
THD+N Total harmonic distortion + noise POUT = 1 W, RL = 8 Ω + 33 µH, fin = 1 kHz .01 %
VN Idle channel noise A-Weighted, 20 Hz - 20 kHz, DAC Modulator Running 10 µV
FPWM Class-D PWM switching frequency Average frequency in Spread Spectrum Mode, CLASSD_SYNC=0 384 kHz
Fixed Frequency Mode, CLASSD_SYNC=0 384 kHz
Fixed Frequency Mode, CLASSD_SYNC=1, fs = 44.1, 88.2, 174.6 kHz 352.8 kHz
Fixed Frequency Mode, CLASSD_SYNC=1, fs = 48, 96, 192 kHz 384 kHz
VOS Output offset voltage -1 1 mV
DNR Dynamic range A-Weighted, -60 dBFS Method 101.2 dB
SNR Signal to noise ratio A-Weighted, Referenced to 1 % THD+N Output Level 105.73 dB
KCP Click and pop performance Into and out of Mute, Shutdown, Power Up, Power Down and audio clocks starting and stopping. Measured with APx Plugin. 3.4 mV
Programmable digital gain range 0 23 dBV
Programmable digital gain step size 0.5 dB
AVERROR Amplifier gain error POUT = 1 W ±0.1 dB
Mute attenuation Device in Shutdown or Muted in Normal Operation 113 dB
VBAT power-supply rejection ratio VBAT = 3.8 V + 200 mVpp, fripple = 217 Hz 110 dB
VBAT = 3.8 V + 200 mVpp, fripple = 20 kHz 95 dB
AVDD power-supply rejection ratio VDD = 1.8 V + 200 mVpp, fripple = 217 Hz 102 dB
VDD = 1.8 V + 200 mVpp, fripple = 20 kHz 102 dB
Turn on time from release of SW shutdown No Volume Ramping 1.8 ms
Volume Ramping 4.5 ms
Turn off time from assertion of SW shutdown to amp Hi-Z No Volume Ramping 0.75 ms
Volume Ramping 12.5 ms
BOOST
CONVERTER
Max Output Voltage 0.1A DC load, Average voltage (w/o including ripple) 13 V
Startup inrush current limit default setting 1.5 A
Startup inrush limit time default setting 0.45 ms
Switching Frequency PFM mode 50 kHz
Current Control Mode 4 MHz
Minimum Switching Frequency Current Control Mode 400 KHz
Inductor Peak Current Limit default setting 5 A
DIE TEMPERATURE
SENSOR
Resolution 8 bits
Die temperature measurement range -40 150 °C
Die temperature resolution 0.75 °C
Die temperature accuracy ±5 °C
VOLTAGE
MONITOR
Resolution 10 bits
VBAT measurement range 2 6 V
VBAT resolution 6 mV
VBAT accuracy ±25 mV
TDM SERIAL AUDIO
PORT
PCM Sample Rates & FSYNC Input Frequency 16 192 kHz
SBCLK Input Frequency I2S/TDM Operation 0.512 24.57 MHz
SBCLK Maximum Input Jitter RMS Jitter below 40 kHz that can be tolerated without performance degradation 1 ns
RMS Jitter above 40 kHz that can be tolerated without performance degradation 10 ns
SBCLK Cycles per FSYNC in I2S and TDM Modes Values: 64, 96, 128, 192, 256, 384 and 512 64 512 Cycles
PCM PLAYBACK
CHARACTERISTICS to fs ≤ 48 kHz
fs Sample Rates 16 48 kHz
Passband LPF Corner 0.454 fs
Passband Ripple 20 Hz to LPF cutoff -0.3 0.3 dB
Stop Band Attenuation ≥ 0.55 fs 60 dB
≥ 1 fs 65 dB
Group Delay DC to 0.454 fs 8.6 1/fs
PCM PLAYBACK
CHARACTERISTICS fs > 48 kHz
fs Sample Rates 88.2 192 kHz
Passband LPF Corner fs = 96 kHz 0.42 fs
fs = 192 kHz 0.21 fs
Passband Ripple DC to LPF cutoff -0.5 0.5 dB
Stop Band Attenuation ≥ 0.55 fs 60 dB
≥ 1 fs 65 dB
Group Delay DC to 0.375 fs for 96 kHz 8.6 1/fs
CURRENT
SENSE
DNR Dynamic range Un-Weighted, Relative to 0 dBFS 69 dB
THD+N Total harmonic distortion + noise RL = 8 Ω + 33 µH, fin = 1 kHz, POUT = 1 W -56 dB
Full-scale input current 3.3 A
Current-sense accuracy RL = 8 Ω + 33 µH, IOUT = 354 mARMS (POUT = 1 W @ 1kHz) ±1 %
Current-sense gain error over temperature 0°C to 70°C, 8 Ω, using a 60Hz -40dB pilot tone ±1 %
Current-sense gain error over output power 50mW to 0.1 % THD+N level, fin = 1 kHz, 8 Ω, using a 60Hz -40dB pilot tone ±1.5 %
LPF passband corner fs = 16 kHz to 48 kHz 0.417 fs
fs = 96 kHz 0.208 fs
fs = 192 kHz 0.104 fs
LPF passband ripple -0.05 0.05 dB
LPF stopband attenuation 0.55 fs 60 dB
LPF group delay DC to 0.417 fs 5.7 1/fs
VOLTAGE
SENSE
DNR Dynamic range Un-Weighted, Relative 0 dBFS 69 dB
THD+N Total harmonic distortion + noise RL = 8 Ω + 33 µH, fin = 1 kHz, POUT = 1W -60 dB
Full-scale input voltage 14 VPK
Voltage-sense accuracy RL = 8 Ω + 33 µH, IOUT = 354 mARMS (POUT = 1 W) ±0.5%
Voltage-sense gain error over temperature 0°C to 70°C, 8 Ω, using a 60Hz -40dB pilot tone ±0.5%
Voltage-sense gain error over output power 50mV to 0.1 % THD+N level, 8 Ω, using a 60Hz -40dB pilot tone ±0.5%
LPF passband corner fs = 16 kHz to 48 kHz 0.417 fs
fs = 96 kHz 0.208 fs
fs = 192 kHz 0.104 fs
LPF passband ripple -0.05 0.05 dB
LPF stopband attenuation 0.55 fs 60 dB
LPF group delay DC to 0.417 fs 5.7 1/fs
VOLTAGE/CURRENT
SENSE RATIO
Gain ratio error over output power 10uW to 0.1% THD+N level, fin = 1 kHz, 8Ω, using a 60Hz -40dB pilot tone ±3%
Gain ratio error over output power 250uW to 0.1 % THD+N level, fin = 1 kHz, 8Ω, using a 60Hz -40dB pilot tone ±2%
Gain ratio error over output power 50mW to 0.1 % THD+N level, fin = 1 kHz, 8Ω, using a 60Hz -40dB pilot tone ±1%
Gain ratio drift over temperature 0°C to 70°C ±1%
V/I phase error 300 ns
TYPICAL CURRENT
CONSUMPTION
Current consumption in hardware shutdown SDZ = 0, VBAT 0.1 µA
SDZ = 0, VDD 1 µA
Current consumption in software shutdown All Clocks Stopped, VBAT 0.5 µA
All Clocks Stopped, VDD 10 µA
Current consumption in idle channel Clocking 0s PCM mode, VBAT 2.7 mA
Clocking 0s PCM mode, VDD 8.9 mA
Current consumption during active operation with IV sense disabled fs = 48 kHz, VBAT 4.6 mA
fs = 48 kHz, VDD 8.9 mA
Current consumption during active operation with IV sense enabled fs = 48 kHz, VBAT 4.6 mA
fs = 48 kHz, VDD 11.4 mA
PROTECTION
CIRCUITRY
Thermal shutdown temperature 140 °C
Thermal shutdown retry 1.5 s
VBAT undervoltage lockout threshold (UVLO) UVLO is asserted 2 V
UVLO is released 2.55 V
Output short circuit limit Output to Output, Output to GND, Output to VBST or Output to VBAT Short 4.5 A