SCPS277B November   2022  – November 2023 TCAL6408

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 I2C Bus Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Voltage Translation
      2. 7.3.2 I/O Port
      3. 7.3.3 Adjustable Output Drive Strength
      4. 7.3.4 Interrupt Output (INT)
      5. 7.3.5 Reset Input (RESET)
      6. 7.3.6 Software Reset Call
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
    6. 7.6 Register Maps
      1. 7.6.1 Device Address
      2. 7.6.2 Control Register and Command Byte
      3. 7.6.3 Register Descriptions
      4. 7.6.4 Bus Transactions
        1. 7.6.4.1 Writes
        2. 7.6.4.2 Reads
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Minimizing ICC When I/Os Control LEDs
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Control Register and Command Byte

Following the successful acknowledgment of the address byte, the bus controller sends a command byte, which is stored in the control register in the TCAL6408. The lower two bits of this data byte reflect the internal registers (input, output, polarity inversion, or configuration) that are affected. Bit 6 in conjunction with the lower three bits of the Command byte are used to point to the extended features of the device (Agile IO). The command byte is sent only during a write transmission.

Once a new command has been sent, the register that was addressed continues to be accessed by reads until a new command byte has been sent. Upon power-up, hardware reset, or software reset, the control register defaults to 00h.

GUID-8CB6A0DE-72E7-4BAF-8CEF-BA4A083896AD-low.gif Figure 7-8 Control Register Bits
Table 7-4 Command Byte
CONTROL REGISTER BITS COMMAND BYTE
(HEX)
REGISTER PROTOCOL POWER-UP
DEFAULT
B7 B6 B5 B4 B3 B2 B1 B0
0 0 0 0 0 0 0 0 00 Input Port Read byte xxxx xxxx
0 0 0 0 0 0 0 1 01 Output Port Read/write byte 1111 1111
0 0 0 0 0 0 1 0 02 Polarity Inversion Read/write byte 0000 0000
0 0 0 0 0 0 1 1 03 Configuration Read/write byte 1111 1111
0 1 0 0 0 0 0 0 40 Output Drive Strength 0 Read/write byte 1111 1111
0 1 0 0 0 0 0 1 41 Output Drive Strength 1 Read/write byte 1111 1111
0 1 0 0 0 0 1 0 42 Input latch register Read/write byte 0000 0000
0 1 0 0 0 0 1 1 43 Pull-up/pull-down enable register Read/write byte 0000 0000
0 1 0 0 0 1 0 0 44 pull-up/pull-down selection register Read/write byte 1111 1111
0 1 0 0 0 1 0 1 45 Interrupt mask register Read/write byte 1111 1111
0 1 0 0 0 1 1 0 46 Interrupt status register Read byte 0000 0000
0 1 0 0 1 1 1 1 4F Output port configuration register Read/write byte 0000 0000