SLLSF18A March   2020  – September 2020 TCAN1046-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Characteristics
    5. 6.5 Supply Characteristics
    6. 6.6 Dissipation Ratings
    7. 6.7 Electrical Characteristics
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Description
        1. 8.3.1.1 TXD1 and TXD2
        2. 8.3.1.2 GND1 and GND2
        3. 8.3.1.3 VCC1 and VCC2
        4. 8.3.1.4 RXD1 and RXD2
        5. 8.3.1.5 CANH1, CANL1, CANH2, and CANL1
        6. 8.3.1.6 STB1 and STB2 (Standby)
      2. 8.3.2 CAN Bus States
      3. 8.3.3 TXD Dominant Timeout (DTO)
      4. 8.3.4 CAN Bus Short Circuit Current Limiting
      5. 8.3.5 Thermal Shutdown (TSD)
      6. 8.3.6 Undervoltage Lockout
      7. 8.3.7 Unpowered Device
      8. 8.3.8 Floating pins
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Modes
      2. 8.4.2 Normal Mode
      3. 8.4.3 Standby Mode
        1. 8.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
      4. 8.4.4 Driver and Receiver Function
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 CAN Termination
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.8 Switching Characteristics

Over recommended operating conditions with TA = -40℃ to 125℃ (unless otherwise noted); Timing parameters apply to both CAN channels
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Device Switching Characteristics
tPROP(LOOP1) Total loop delay, driver input (TXD) to receiver output (RXD), recessive to dominant Normal mode, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF

See Figure 7-4
 125 210 ns
tPROP(LOOP2) Total loop delay, driver input (TXD) to receiver output (RXD), dominant to recessive Normal mode, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF

See Figure 7-4
 150 210 ns
tMODE Mode change time, from normal to standby or from standby to normal See Figure 7-5
 20 µs
tWK_FILTER Filter time for a valid wake-up pattern See Figure 8-5 0.5 1.8 µs
tWK_TIMEOUT Bus wake-up timeout See Figure 8-5 0.8 6 ms
Driver Switching Characteristics
tpHR Propagation delay time, high TXD to driver recessive (dominant to recessive)(1) STB = 0 V , RL = 60 Ω, CL = 100 pF
See Figure 7-2 and Figure 7-6
 		 35 80 115 ns
tpLD Propagation delay time, low TXD to driver dominant (recessive to dominant)(1) 20 70 120 ns
tsk(p) Pulse skew (|tpHR - tpLD|) 20 ns
tR Differential output signal rise time 30 ns
tF Differential output signal fall time 50 ns
tTXD_DTO Dominant timeout 1.2 4.0 ms
Receiver Switching Characteristics
tpRH Propagation delay time, bus recessive input to high output (dominant to recessive)(1) STB = 0 V , CL(RXD) = 15 pF
See Figure 7-3		 40 90 150 ns
tpDL Propagation delay time, bus dominant input to low output (recessive to dominant)(1) 35 65 140 ns
tR RXD output signal rise time 10 ns
tF RXD output signal fall time 10 ns
(1)FD Timing Characteristics
tBIT(BUS) Bit time on CAN bus output pins
tBIT(TXD) = 500 ns		 STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF
ΔtREC = tBIT(RXD) - tBIT(BUS)
See Figure 7-4		 460 510 ns
tBIT(BUS) Bit time on CAN bus output pins
tBIT(TXD) = 200 ns		 160 210 ns
tBIT(RXD) Bit time on RXD output pins
tBIT(TXD) = 500 ns		 445 515 ns
tBIT(RXD) Bit time on RXD output pins
tBIT(TXD) = 200 ns		 145 215 ns
ΔtREC Receiver timing symmetry
tBIT(TXD) = 500 ns		 -35 15 ns
ΔtREC Receiver timing symmetry
tBIT(TXD) = 200 ns		 -35 15 ns
(1) Specified by design and characterization