SLLSFQ5A january   2023  – july 2023 THVD1454

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings [IEC]
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics_500 kbps
    9. 6.9  Switching Characteristics_20 Mbps
    10. 6.10 Switching Characteristics_Termination resistor
    11. 6.11 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 On-Chip Switchable Termination
      2. 8.4.2 Operational Data rate
      3. 8.4.3 Protection Features
  10. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
        5. 9.2.1.5 Transient Protection
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-20230103-CA0I-RLCC-QZHT-MHNM5KV1GWXR-low.svg Figure 5-1 VSON (DRC) Package, 10-Pins
(Top View)
Table 5-1 Pin Functions
PINTYPEDESCRIPTION
NAMENO.
R1Digital outputLogic output RS-485 data
RE2Digital inputReceiver enable/disable. Internal pull-up. Receiver disabled by default
DE3Digital inputDriver enable/disable. Internal pull-down. Driver disabled by default
D4Digital inputLogic input RS485 data. Internal pull-up. Drives the bus high by default if driver is enabled
TERM5Digital input120 Ω on-chip termination control for A/B pins. Internal pull-down. Termination across A/B is disabled by default
GND6GNDGround
SLR7Digital inputSlew rate control. Internal pull-down, default 20 Mbps operation. Logic high SLR enables slow speed (500 kbps)
A8Bus input/outputRS-485 bus pin. This pin is non-inverting driver output or non-inverting receiver input
B 9 Bus input/output RS-485 bus pin. This pin is inverting driver output or inverting receiver input
VCC 10 Power 3 V to 5.5 V supply
Thermal Pad -- Connect to GND for optimal thermal and electrical performance