SBVS241 April   2014 TLC5954

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Pin Equivalent Input and Output Schematic Diagrams
    2. 7.2 Test Circuits
    3. 7.3 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Current Calculation
      2. 8.3.2 Status Information Data (SID)
      3. 8.3.3 LED Open Detection (LOD)
      4. 8.3.4 LED Short Detection (LSD)
      5. 8.3.5 Noise Reduction
    4. 8.4 Device Functional Modes
      1. 8.4.1 Maximum Constant Sink Current
      2. 8.4.2 Global Brightness Control (BC) Function: Sink Current Control
      3. 8.4.3 Constant-Current Output On or Off Control
      4. 8.4.4 Power-Save Mode
    5. 8.5 Register Maps
      1. 8.5.1 Register and Data Latch Configuration
        1. 8.5.1.1 Common Shift Register
        2. 8.5.1.2 Output On or Off Data Latch
        3. 8.5.1.3 Maximum Current Control (MC), Global Brightness Control (BC), and Function Control (FC) Data Latch
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step-by-Step Design Procedure
        2. 9.2.2.2 Maximum Current (MC) Data
        3. 9.2.2.3 Global Brightness Control (BC) Data
        4. 9.2.2.4 On or Off Data
        5. 9.2.2.5 Other Control Data
        6. 9.2.2.6 Grayscale Control
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

RTQ Package
VQFN-56
(Top View)
po_rtq_bvs241.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
GND 1, 56 — Ground. All GND pins are connected internally.
OUTR0 to OUTR15 2, 5, 8, 11, 14, 17, 20, 23, 30, 33, 36, 39, 44, 47, 50, 53 O Red LED constant-current outputs (OUTRn).
Multiple outputs can be tied together to increase the constant-current capability. Different voltages can be applied to each output. These outputs are turned on or off by the BLANK signal and the data in the output on or off control data latch.
OUTG0 to OUTG15 3, 6, 9, 12, 15, 18, 21, 24, 31, 34, 37, 40, 45, 48, 51, 54 O Green LED constant-current outputs (OUTGn).
Multiple outputs can be tied together to increase the constant-current capability. Different voltages can be applied to each output. These outputs are turned on or off by the BLANK signal and the data in the output on or off control data latch.
OUTB0 to OUTB15 4, 7, 10, 13, 16, 19, 22, 25, 32, 35, 38, 41, 46, 49, 52, 55 O Blue LED constant-current outputs (OUTBn).
Multiple outputs can be tied together to increase the constant-current capability. Different voltages can be applied to each output. These outputs are turned on or off by the BLANK signal and the data in the output on or off control data latch.
SIN 26 I Serial data input of the 49-bit common shift register, Schmitt buffer input.
When SIN is high, the LSB is set to 1 for only one SCLK input rising edge. If two SCLK rising edges are input while SIN is high, then the 49-bit shift register LSB and LSB+1 are set to 1. When SIN is low, the LSB is set to 0 at the SCLK input rising edge.
LAT 27 I Edge-triggered latch, Schmitt buffer input.
The LAT rising edge latches data from the common shift register either into the output on or off data latch or the maximum current control (MC), brightness control (BC), or function control (FC) data latch. When the common shift register data are latched into the on or off data latch, data in the common shift register are simultaneously replaced with SID, which is selected by SIDLD. Refer to the Output On or Off Data Latch and Status Information Data (SID) sections for more details.
SCLK 28 I Serial data shift clock, Schmitt buffer input.
Data present on SIN are shifted to the 49-bit common shift register LSB with the SCLK rising edge. Data in the shift register are shifted towards the MSB at each SCLK rising edge. The common shift register MSB appears on SOUT.
BLANK 29 I Blank all outputs, Schmitt buffer input.
When BLANK is high, all constant-current outputs (OUTXn) are forced off. When BLANK is low, all OUTXn are controlled by the on or off control data in the data latch.
SOUT 42 O Serial data output of the 49-bit common shift register.
SOUT is connected to the MSB of the register. Data are clocked out at the SCLK rising edge.
VCC 43 — Power-supply voltage
Thermal pad — Ground. The thermal pad must be connected to GND on the printed circuit board (PCB).