SLVSEB3A June   2018  – January 2019 TLC6946 , TLC6948

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Schematic of TLC6948 With 48-Multiplexing
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Pin Equivalent Input and Output Schematic Diagrams
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Built-In 16Kb Display Memory (SRAM)
      2. 9.3.2  GCLK Dual-Edge Operation
      3. 9.3.3  Programmable Constant-Sink Channel Current
        1. 9.3.3.1 Global Brightness Control (BC)
        2. 9.3.3.2 Select RIREF for a Given BC
      4. 9.3.4  Grayscale (GS) Function (PWM Control)
      5. 9.3.5  Serial Data Interface
      6. 9.3.6  LED-Open Detection (LOD)
      7. 9.3.7  Caterpillar Removal
      8. 9.3.8  Precharge FET
      9. 9.3.9  Thermal Shutdown
      10. 9.3.10 IREF Resistor Short Protection (ISP)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Operating Mode
      2. 9.4.2 Power-Save Mode (PSM)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedures
        1. 10.2.2.1 Power Supply Voltage
        2. 10.2.2.2 Channel Current and Brightness Control
        3. 10.2.2.3 SCLK and GCLK Frequency
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4 Thermal Information

THERMAL METRIC(1) TLC6946 UNIT
DBQ (SSOP) RGE (VQFN)
24 PINS 24 PINS
RθJA Junction-to-ambient thermal resistance 87.2 35.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 42.3 34.7 °C/W
RθJB Junction-to-board thermal resistance 41.4 15.2 °C/W
ψJT Junction-to-top characterization parameter 9.2 0.7 °C/W
ψJB Junction-to-board characterization parameter 41 15.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 5 °C/W
(1) For more information about traditional and new thermalmetrics, see the Semiconductor and IC Package Thermal Metrics application report.