SLOS197B August   1997  – July 2025 TLV2721

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics VS = 3V
    5. 5.5 Electrical Characteristics VS = 5V
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Large Capacitive Loads
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Electrical Characteristics VS = 3V

at TA = 25°C, VDD = 3V, RL = 2kΩ connected to mid-supply, and VIC = VOUT = VDD / 2 (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VIO Input offset voltage TLV2721C, TA = 0°C to 70°C  ±0.5 ±3 mV
TLV2721I, TA = –40°C to +85°C ±0.5 ±3
dVIO/dT Input offset voltage drift TLV2721C, TA = 0°C to 70°C ±1 μV/°C
TLV2721I, TA = –40°C to +85°C ±1
PSRR Power supply rejection ratio V+ = 2.7V to 8V, no load  70 95 dB
TLV2721C
TA = 0°C to 70°C 		 66
TLV2721I
TA = –40°C to +85°C		 66
INPUT BIAS CURRENT
IIB Input bias current(1) ±1 ±60 pA
TLV2721C, TA = 0°C to 70°C  ±150
TLV2721I, TA = –40°C to +85°C ±150
IIO Input offset current(1) ±0.5 ±60 pA
TLV2721C, TA = 0°C to 70°C ±150
TLV2721I, TA = –40°C to +85°C ±150
NOISE
Vn Input voltage noise f = 10Hz 120 nV/√Hz
f = 1kHz  38
VNPP Peak-to-peak equivalent input noise voltage f = 0.1Hz to 1Hz  3 µV
f = 0.1Hz to 10Hz  6
In Input current noise 2 fA/√Hz
THD + N Total harmonic distortion plus noise VO = 1V to 2V, f = 20kHz,
RL = 2kΩ to 1.5V		 G = 1 2.52 %
G = 10 7.01
VO = 1V to 2V, f = 20kHz,
RL = 2kΩ to 0V		 G = 1 0.076
G = 10 0.147
INPUT VOLTAGE RANGE
VIC Common-mode input voltage VIO ≤ 5mV 0 to 2 –0.3 to +2.2 V
TLV2721C
TA = 0°C to 70°C		 0 to 1.7
TLV2721I
TA = –40°C to +85°C		 0 to 1.7
CMRR Common-mode rejection ratio VIC = 0V to 1.7V  58 77 dB
TLV2721C
TA = 0°C to 70°C		 55
TLV2721I
TA = –40°C to +85°C		 55
INPUT CAPACITANCE
Input resistance Differential  5409 Ω
Common-mode 1012
cic Common-mode input capacitance f = 10kHz 6 pF
OPEN-LOOP GAIN
AVD Large-signal differential voltage amplification VO = 1V to 2V, RL = 2kΩ 2 3 V/mV
TLV2721C
TA = 0°C to 70°C		 1
TLV2721I
TA = –40°C to +85°C		 1
VO = 1V to 2V, RL = 10kΩ 250
FREQUENCY RESPONSE
GBW Gain bandwidth product f = 1kHz, CL = 100pF, RL = 2kΩ 480 kHz
BOM Maximum output-swing bandwidth VO = 1VPP, G = 1, CL = 100pF, RL = 2kΩ 30 kHz
SR Slew rate G = 1, CL = 100pF, RL = 2kΩ  0.25 V/ms
tS Settling time G = –1, 1V to 2V step, RL = 2kΩ,
CL = 100pF		 0.1% 4.5 µs
0.01% 6.8
ΘM Phase margin at unity gain RL = 2kΩ, CL = 100pF 53 °
GM Gain margin RL = 2kΩ, CL = 100pF 12 dB
OUTPUT
VO Voltage output swing To positive rail, IL = –100µA 2.97 V
To positive rail, IL = –400µA 2.88
TLV2721C
TA = 0°C to 70°C		 2.6
TLV2721I
TA = –40°C to +85°C		 2.6
To negative rail, IL = 50µA 15 mV
To negative rail, IL = 500µA 150
TLV2721C
TA = 0°C to 70°C		 500
TLV2721I
TA = –40°C to +85°C		 500
ZO Closed-loop output impedance f = 10kHz, G = 10 90 Ω
POWER SUPPLY
IDD Supply current No load 100 150 µA
TLV2721C
TA = 0°C to 70°C		 200
TLV2721I
TA = –40°C to +85°C		 200
(1) Specification established from device population bench system measurements across multiple lots.