SLCS137D November   2000  – May 2017 TLV3701 , TLV3702 , TLV3704

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Tables
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Recommended Operating Conditions
    3. 7.3 Thermal Information - TLV3701
    4. 7.4 Thermal Information - TLV3702
    5. 7.5 Thermal Information - TLV3704
    6. 7.6 Electrical Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Dissipation Ratings
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Setting the Threshold
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 DIP Adapter EVM
        2. 12.1.1.2 Universal Op Amp EVM
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

TLV3701 DBV Package
5-Pin SOT-23
Top View
TLV3701 TLV3702 TLV3704 po_dbv_lcs135.gif
TLV3701 D or P Package
8-Pin SOIC or PDIP
Top View
TLV3701 TLV3702 TLV3704 po_d_p_lcs135.gif

TLV3701 Pin Functions

PIN I/O DESCRIPTION
NAME SOT-23 SOIC, PDIP
GND 2 4 — Ground
IN– 4 2 I Negative (inverting) input
IN+ 3 3 I Positive (noninverting) input
NC — 1, 5, 8 — No internal connection (can be left floating)
OUT 1 6 O Output
VCC 5 7 — Positive power supply
TLV3702 D, DGK, or P Package
8-Pin SOIC, VSSOP, or PDIP
Top View
TLV3701 TLV3702 TLV3704 po_d_dgk_p_lcs135.gif

TLV3702 Pin Functions

PIN I/O DESCRIPTION
NAME NO.
GND 4 — Ground
1IN– 2 I Inverting input, channel 1
2IN– 6 I Inverting input, channel 2
1IN+ 3 I Noninverting input, channel 1
2IN+ 5 I Noninverting input, channel 2
1OUT 1 O Output, channel 1
2OUT 7 O Output, channel 2
VCC 8 — Positive power supply
TLV3704 D, N, or PW Package
14-Pin SOIC, PDIP, or TSSOP
Top View
TLV3701 TLV3702 TLV3704 po_d_n_pw_lcs135.gif

TLV3704 Pin Functions

PIN I/O DESCRIPTION
NAME NO.
GND 11 — Ground
1IN– 2 I Inverting input, channel 1
2IN– 6 I Inverting input, channel 2
3IN– 9 I Inverting input, channel 3
4IN– 13 I Inverting input, channel 4
1IN+ 3 I Noninverting input, channel 1
2IN+ 5 I Noninverting input, channel 2
3IN+ 10 I Noninverting input, channel 3
4IN+ 12 I Noninverting input, channel 4
1OUT 1 O Output, channel 1
2OUT 7 O Output, channel 2
3OUT 8 O Output, channel 3
4OUT 14 O Output, channel 4
VCC 4 — Positive power supply