SNOSDD7C December   2021  – December 2023 TLV3801 , TLV3802 , TLV3811

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Diagrams
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Inputs
      2. 7.4.2 LVDS Output
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Capacitive Loads
      2. 8.1.2 Hysteresis
    2. 8.2 Typical Application
      1. 8.2.1 Optical Receiver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Performance Plots
      2. 8.2.2 Non-Inverting Comparator With Hysteresis
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Performance Plots
      3. 8.2.3 Logic Clock Source to LVDS Transceiver
      4. 8.2.4 External Trigger Function for Oscilloscopes
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.2 Hysteresis

A comparator's high, open-loop gain creates a small band of input differential voltage where the comparator may produce "chatter" which causes the output to toggle back and forth between a “logic high” and a “logic low”. This can cause design challenges for inputs with slow rise and fall times or systems with excessive noise. These challenges can be prevented by adding hysteresis to the comparator. However, hysteresis must be added strategically when input signals are small since it can cuase signals to go undetected. As a result, TLV3811C is optimized for detecting small, fast-switching inputs and has 0 mV of internal hysteresis. On the other hand, for detecting larger input signals in the presense of noise, the TLV3811 has 1.1 mV of internal hysteresis and TLV3801 and TLV3802 have 2 mV.

Since the TLV380x/TLV3811(C) only have a minimal amount of internal hysteresis, external hysteresis can be applied in the form of a positive feedback loop that adjusts the trip point of the comparator depending on its current output state. See the Non-Inverting Comparator With Hysteresis section for more details.