SLVSA61H February 2010 – August 2016
When laying out the board for the TLV700xx-Q1, TI recommends that the board be designed with separate ground planes for VIN and VOUT which are only connected at the GND pin of the device. Input and output capacitors should be placed as close to the device pins as possible. Also, the ground connection for the bypass capacitor must be connected directly to the GND pin of the device. Improve the PSRR output noise, and transient-response performance of the TLV700xx-Q1 by following these layout guidelines.