SBOS941D Data sheet | TI.com

SBOS941D February 2019 – August 2021 TLV9301 , TLV9302 , TLV9304

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

DCK|5
- MPDS025H
DBV|5
- MPDS018S

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6.8 Typical Characteristics

at T_A = 25°C, V_S = ±20 V, V_CM = V_S / 2, R_LOAD = 10 kΩ connected to V_S / 2, and C_L = 100 pF (unless otherwise noted)

T_A = 25°C

Figure 6-1 Offset Voltage Production Distribution

V_CM = V+

Figure 6-3 Offset Voltage vs Temperature

T_A = 25°C

Figure 6-5 Offset Voltage vs Common-Mode Voltage

C_LOAD = 15 pF

Figure 6-7 Open-Loop Gain and Phase vs Frequency

Figure 6-9 Input Bias Current vs Common-Mode Voltage

Figure 6-11 Output Voltage Swing vs Output Current (Sourcing)

V_S = 5 V

Figure 6-13 Output Voltage Swing vs Output Current (Sourcing)

Figure 6-15 CMRR and PSRR vs Frequency

f = 0 Hz

Figure 6-17 PSRR vs Temperature (dB)

Figure 6-19 Input Voltage Noise Spectral Density vs Frequency

BW = 80 kHz, f = 1 kHz

Figure 6-21 THD+N vs Output Amplitude

Figure 6-23 Quiescent Current vs Temperature

Figure 6-25 Open-Loop Output Impedance vs Frequency

G = 1, 100-mV output step

Figure 6-27 Small-Signal Overshoot vs Capacitive Load

Figure 6-29 No Phase Reversal

G = –10

Figure 6-31 Negative Overload Recovery

R_L = 1 kΩ, C_L = 20 pF, G = –1, 10-mV step response

Figure 6-33 Small-Signal Step Response

C_L = 20 pF, G = 1

Figure 6-35 Large-Signal Step Response (Rising)

Figure 6-37 Short-Circuit Current vs Temperature

Figure 6-39 Channel Separation vs Frequency

Figure 6-2 Offset Voltage Drift Distribution

V_CM = V–

Figure 6-4 Offset Voltage vs Temperature

Figure 6-6 Offset Voltage vs Power Supply

Figure 6-8 Closed-Loop Gain and Phase vs Frequency

Figure 6-10 Input Bias Current vs Temperature

Figure 6-12 Output Voltage Swing vs Output Current (Sinking)

V_S = 5 V

Figure 6-14 Output Voltage Swing vs Output Current (Sinking)

f = 0 Hz

Figure 6-16 CMRR vs Temperature (dB)

Figure 6-18 0.1-Hz to 10-Hz Noise

BW = 80 kHz, V_OUT = 3.5 V_RMS

Figure 6-20 THD+N Ratio vs Frequency

Figure 6-22 Quiescent Current vs Supply Voltage

Figure 6-24 Open-Loop Voltage Gain vs Temperature (dB)

G = –1, 100-mV output step

Figure 6-26 Small-Signal Overshoot vs Capacitive Load

G = –1, 100-mV output step

Figure 6-28 Small-Signal Overshoot vs Capacitive Load

G = –10

Figure 6-30 Positive Overload Recovery

C_L = 20 pF, G = 1, 20-mV step response

Figure 6-32 Small-Signal Step Response

C_L = 20 pF, G = 1

Figure 6-34 Large-Signal Step Response (Falling)

C_L = 10 pF, G = –1

Figure 6-36 Large-Signal Step Response

Figure 6-38 Maximum Output Voltage vs Frequency

Figure 6-40 EMIRR (Electromagnetic Interference Rejection Ratio) vs Frequency