SLOS275E January   2000  – November 2016 TPA0211

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics - 3 V
    6. 7.6 Electrical Characteristics - 5 V
    7. 7.7 Dissipation Ratings
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Set-Up for Graphs
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bridged-Tied Load Versus Single-Ended Mode
      2. 9.3.2 Single-Ended Operation
      3. 9.3.3 BTL Amplifier Efficiency
      4. 9.3.4 Gain Setting Via Input Resistance
      5. 9.3.5 Crest Factor
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 SE/BTL (Stereo/Mono) Operation
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Surface Mount Capacitor
        2. 10.2.2.2 Input Capacitor, Ci
        3. 10.2.2.3 Power Supply Decoupling, C(S)
        4. 10.2.2.4 Midrail Bypass Capacitor, C(BYP)
        5. 10.2.2.5 Output Coupling Capacitor, C(C)
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Decoupling Capacitors
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Component Placement
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGN|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage, VDD 6 V
Input voltage, VI –0.3 VDD + 0.3 V
Continuous total power dissipation Internally limited
(see Dissipation Ratings)
Lead temperature, 1.6 mm (1/16 inch) from case (10 s) 260 °C
Operating junction temperature, TJ –40 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VDD Supply voltage 2.5 5.5 V
VIH High-level input voltage SE/BTL VDD = 3 V 2.7 V
VDD = 5 V 4.5
SHUTDOWN 2
VIL Low-level input voltage SE/BTL VDD = 3 V 1.65 V
VDD = 5 V 2.75
SHUTDOWN 0.8
TA Operating free-air temperature –40 85 °C

7.4 Thermal Information

THERMAL METRIC(1) TPA0211 UNIT
DGN (MSOP-PowerPAD)
8 PINS
RθJA Junction-to-ambient thermal resistance 51.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 41.9 °C/W
RθJB Junction-to-board thermal resistance 30.5 °C/W
ψJT Junction-to-top characterization parameter 1.5 °C/W
ψJB Junction-to-board characterization parameter 30.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics – 3 V

VDD = 3 V and TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|VOO| Output offset voltage (measured differentially) SE/BTL = 0 V, SHUTDOWN = 2 V, RL = 8 Ω,
inputs floating		 30 mV
IDD(BTL) Supply current, BTL mode SE/BTL = 1.375 V, SHUTDOWN = 2 V, VDD = 2.5 V 4 6 mA
IDD(SE) Supply current, SE mode SE/BTL = 2.25 V, SHUTDOWN = 2 V, VDD = 2.5 V 2 4 mA
IDD(SD) Supply current,
shutdown mode		 SE/BTL = 3 V, SHUTDOWN = 0 V 1 10 µA
|IIH| High-level input current VDD = 3.3 V, VI = VDD SHUTDOWN 1 µA
SE/BTL 1
|IIL| Low-level input current VDD = 3.3 V, VI = 0 V SHUTDOWN 1 µA
SE/BTL 1
RF Feedback resistor SE/BTL = 0 V, SHUTDOWN = 2 V, VDD = 2.5 V,
RL = 4 Ω		 45 50 60 kΩ
OPERATING CHARACTERISTICS, RL = 4 Ω
PO Output power THD = 1%, BTL mode, f = 1 kHz 660 mW
THD = 0.1%, SE mode, f = 1 kHz, RL = 32 Ω 33
THD+N Total harmonic distortion
plus noise		 PO = 500 mW, f = 20 Hz to 20 kHz 0.3%
BOM Maximum output power bandwidth Gain = 2, THD = 2% 20 kHz
SNR Signal-to-noise ratio 88 dB
Vn Output noise voltage CB = 0.47 µF,
f = 20 Hz to 20 kHz		 BTL mode, RL = 8 Ω,AV = 8 dB 65 µVRMS
SE mode, RL = 32 Ω, AV = 2 dB 25

7.6 Electrical Characteristics – 5 V

VDD = 5 V and TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|VOO| Output offset voltage (measured differentially) SE/BTL = 0 V, SHUTDOWN = 2 V, RL = 8 Ω,
inputs floating		 30 mV
IDD(BTL) Supply current, BTL mode SE/BTL = 2.75 V, SHUTDOWN = VDD 4 6 mA
IDD(SE) Supply current, SE mode SE/BTL = 4.5 V, SHUTDOWN = VDD 2 4 mA
IDD(SD) Supply current,
shutdown mode		 SE/BTL = 5 V, SHUTDOWN = 0 V 1 10 µA
|IIH| High-level input current VDD = 5.5 V, VI = VDD SHUTDOWN 1 µA
SE/BTL 1
|IIL| Low-level input current VDD = 5.5 V, VI = 0 V SHUTDOWN 1 µA
SE/BTL 1
OPERATING CHARACTERISTICS, RL = 4 Ω
PO Output power THD = 1%, BTL mode, f = 1 kHz 2 W
THD = 0.1%, SE mode, f = 1 kHz, RL = 32 Ω 92 mW
THD+N Total harmonic distortion
plus noise		 PO = 1.5 W, f = 20 Hz to 20 kHz 0.2%
BOM Maximum output power bandwidth Gain = 2.5, THD = 2% 20 kHz
SNR Signal-to-noise ratio 93 dB
Vn Output noise voltage CB = 0.47 µF,
f = 20 Hz to 20 kHz		 BTL mode, RL = 8 Ω,
AV = 8 dB		 65 µVRMS
SE mode, RL = 32 Ω,
AV = 2 dB		 25

7.7 Dissipation Ratings

PACKAGE TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C
DGN 2.14 W(1) 17.1 mW/°C 1.37 W 1.11 W
(1) See PowerPAD™ Thermally Enhanced Package (SLMA002) for more information on the PowerPAD™ package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD on page 33 of that document.

7.8 Typical Characteristics

Table 1. Table of Graphs

FIGURE
Supply ripple rejection ratio vs Frequency Figure 1, Figure 2
IDD Supply current vs Supply voltage Figure 3
PO Output power vs Supply voltage Figure 4, Figure 5
vs Load resistance Figure 6, Figure 7
THD+N Total harmonic distortion plus noise vs Frequency Figure 8, Figure 9,
Figure 10, Figure 11
vs Output power Figure 12, Figure 13, Figure 14,
Figure 15, Figure 16, Figure 17
Vn Output noise voltage vs Frequency Figure 18, Figure 19
Closed loop gain and phase Figure 20, Figure 21
TPA0211 Fig_1_SLOS275.gif Figure 1. Supply Ripple Rejection Ratio
vs Frequency
TPA0211 Fig_3_SLOS275.gif Figure 3. Supply Current vs Supply Voltage
TPA0211 Fig_5_SLOS275.gif Figure 5. Output Power vs Supply Voltage
TPA0211 Fig_7_SLOS275.gif Figure 7. Output Power vs Load Resistance
TPA0211 Fig_9_SLOS275.gif Figure 9. Total Harmonic Distortion Plus Noise
vs Frequency
TPA0211 Fig_11_SLOS275.gif Figure 11. Total Harmonic Distortion Plus Noise
vs Frequency
TPA0211 Fig_13_SLOS275.gif Figure 13. Total Harmonic Distortion Plus Noise
vs Output Power
TPA0211 Fig_15_SLOS275.gif Figure 15. Total Harmonic Distortion Plus Noise
vs Output Power
TPA0211 Fig_17_SLOS275.gif Figure 17. Total Harmonic Distortion Plus Noise
vs Output Power
TPA0211 Fig_19_SLOS275.gif Figure 19. Output Noise Voltage vs Frequency
TPA0211 Fig_21_SLOS275.gif Figure 21. Closed Loop Response
TPA0211 Fig_2_SLOS275.gif Figure 2. Supply Ripple Rejection Ratio
vs Frequency
TPA0211 Fig_4_SLOS275.gif Figure 4. Output Power vs Supply Voltage
TPA0211 Fig_6_SLOS275.gif Figure 6. Output Power vs Load Resistance
TPA0211 Fig_8_SLOS275.gif Figure 8. Total Harmonic Distortion Plus Noise
vs Frequency
TPA0211 Fig_10_SLOS275.gif Figure 10. Total Harmonic Distortion Plus Noise
vs Frequency
TPA0211 Fig_12_SLOS275.gif Figure 12. Total Harmonic Distortion Plus Noise
vs Output Power
TPA0211 Fig_14_SLOS275.gif Figure 14. Total Harmonic Distortion Plus Noise
vs Output Power
TPA0211 Fig_16_SLOS275.gif Figure 16. Total Harmonic Distortion Plus Noise
vs Output Power
TPA0211 Fig_18_SLOS275.gif Figure 18. Output Noise Voltage vs Frequency
TPA0211 Fig_20_SLOS275.gif Figure 20. Closed Loop Response