SLVSCP4B Data sheet

SLVSCP4B October 2014 – August 2015 TPD3S014 , TPD3S044

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

DBV|6
- MPDS026O

Thermal pad, mechanical data (Package|Pins)

Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted)⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
Input voltage⁽³⁾	V_IN	–0.3	6	V
	V_OUT	–0.3	6
	EN	–0.3	6
	D1	–0.3	6
	D2	–0.3	6
Voltage from V_INto V_OUT		–6	6	V
Junction temperature, T_J		Internally limited
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Voltages are with respect to GND unless otherwise noted.

(3) See the Input and Output Capacitance section.

7.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	All pins	±2000	V
		Charged device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	All pins	±500
		IEC 61000-4-2 contact discharge⁽³⁾	V_OUT, Dx pins	±12000
		IEC 61000-4-2 air-gap discharge⁽³⁾	V_OUT, Dx pins	±15000

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as ±2000 V may actually have higher performance.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as ±500 V may actually have higher performance.

(3) V_OUT was tested on a PCB with input and output bypassing capacitors of 0.1 µF and 120 µF, respectively.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_IN	Input voltage	4.5	5.5	V
V_EN	Input voltage, EN	0	5.5	V
V_IH	High-level Input voltage, EN	2		V
V_IL	Low-level Input voltage, EN		0.7	V
C_IN	Input decoupling capacitance, IN to GND	0.1		µF
I_OUT⁽¹⁾	Continuous output current (TPD3S014)		0.5	A
I_OUT⁽¹⁾	Continuous output current (TPD3S044)		1.5	A
T_J	Operating junction temperature	–40	125	°C

(1) Package and current ratings may require an ambient temperature derating of 85°C

7.4 Thermal Information

THERMAL METRIC⁽¹⁾⁽²⁾		TPD3S0x4	UNIT
		DBV (SOT-23)
		6 PINS
R_θJA	Junction-to-ambient thermal resistance	185.8	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	124.7	°C/W
R_θJB	Junction-to-board thermal resistance	32.0	°C/W
ψ_JT	Junction-to-top characterization parameter	23.7	°C/W
ψ_JB	Junction-to-board characterization parameter	31.5	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	N/A	°C/W
R_θJA(Custom)	See the Power Dissipation and Junction Temperature section	120.3	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

(2) See Device Comparison Table.

7.5 Electrical Characteristics: T_J = T_A = 25°C

Unless otherwise noted: V_IN = 5 V, V_EN = V_IN, I_OUT = 0 A. See Device Comparison Table for the rated current of each part number. Parametrics over a wider operational range are shown in the second Electrical Characteristics: –40°C ≤ TJ ≤ 125°C table.

PARAMETER		TEST CONDITIONS⁽¹⁾	MIN	TYP	MAX	UNIT
POWER SWITCH
R_DS(on)	Input – Output resistance	TPD3S014		97	110	mΩ
		TPD3S014: –40°C ≤ (T_J, T_A) ≤ 85°C		96	130
		TPD3S044		74	91
		TPD3S044: –40°C ≤ (T_J, T_A) ≤ 85°C		74	106
CURRENT LIMIT
I_OS⁽²⁾	Current limit, see Figure 27	TPD3S014	0.67	0.85	1.01	A
I_OS⁽²⁾	Current limit, see Figure 27	TPD3S044	1.70	2.15	2.50	A
SUPPLY CURRENT
I_SD	Supply current, switch disabled	I_OUT = 0A		0.02	1	µA
I_SD	Supply current, switch disabled	–40°C ≤ (T_J, T_A) ≤ 85°C, V_IN = 5.5 V, I_OUT = 0 A			2	µA
I_SE	Supply current, switch enabled	I_OUT = 0A		66	74	µA
I_SE	Supply current, switch enabled	–40°C ≤ (T_J, T_A) ≤ 85°C, V_IN = 5.5 V, I_OUT = 0 A			85	µA
I_REV	Reverse leakage current	V_OUT = 5 V, V_IN = 0 V, Measure I_VOUT		0.2	1	µA
I_REV	Reverse leakage current	–40°C ≤ (T_J, T_A) ≤ 85°C, V_OUT = 5 V, V_IN = 0 V, measure IV_OUT			5	µA
OUTPUT DISCHARGE
R_PD	Output pull-down resistance⁽³⁾	V_IN = V_OUT = 5 V, disabled	400	456	600	Ω
ESD PROTECTION
ΔC_IO	Differential capacitance between the D1, D2 lines	ƒ = 1 MHz, V_IO = 2.5 V		0.02		pF
C_IO	(D1, D2 to GND)	ƒ = 1 MHz, V_IO = 2.5 V		1.4		pF
R_DYN	Dynamic on-resistance D1, D2 IEC clamps⁽⁴⁾	Dx to GND		0.2		Ω
R_DYN	Dynamic on-resistance D1, D2 IEC clamps⁽⁴⁾	GND to Dx		0.2		Ω

(1) Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature

(2) See Current Limit for explanation of this parameter.

(3) These Parameters are provided for reference only, and do not constitute a part of TI’s published device specifications for purposes of TI’s product warranty.

(4) RDYN was extracted using the least squares first of the TLP characteristics between I = 20 A and I = 30 A.

7.6 Electrical Characteristics: –40°C ≤ T_J ≤ 125°C

Unless otherwise noted: 4.5 V ≤ V_IN ≤ 5.5 V, V_EN = V_IN, I_OUT = 0 A, typical values are at 5 V and 25°C. See the Device Comparison Table for the rated current of each part number.

PARAMETER		TEST CONDITIONS⁽¹⁾	MIN	TYP	MAX	UNIT
POWER SWITCH
R_DS(on)	Input – output resistance	TPD3S014		97	154	mΩ
R_DS(on)	Input – output resistance	TPD3S044		74	121	mΩ
ENABLE INPUT (EN)
	Threshold	Input rising	1	1.45	2	V
	Hysteresis			0.13		V
	Leakage current	V_EN= 0 V	–1	0	1	µA
t_ON	Turn on time	V_IN = 5 V, C_L = 1 µF, R_L = 100 Ω, EN ↑ See Figure 26	1	1.6	2.2	ms
t_OFF	Turn off time	V_IN = 5 V, C_L = 1 µF, R_L = 100 Ω, EN ↓ See Figure 26	1.7	2.1	2.7	ms
t_R	Rise time, output	C_L = 1 µF, R_L = 100 Ω, V_IN = 5 V, See Figure 25	0.4	0.64	0.9	ms
t_F	Fall time, output	C_L = 1 µF, R_L = 100 Ω, V_IN = 5 V, See Figure 25	0.25	0.4	0.8	ms
CURRENT LIMIT
I_OS⁽²⁾	Current limit, see Figure 27	TPD3S014	0.65	0.85	1.05	A
I_OS⁽²⁾	Current limit, see Figure 27	TPD3S044	1.60	2.15	2.70	A
t_IOS	Short-circuit response time⁽³⁾	V_IN = 5 V (see Figure 27) One Half full load → R_SHORT = 50 mΩ Measure from application to when current falls below 120% of final value		2		µs
SUPPLY CURRENT
I_SD	Supply current, switch disabled	I_OUT = 0 A		0.02	10	µA
I_SE	Supply current, switch enabled	I_OUT = 0 A		66	94	µA
I_REV	Reverse leakage current	V_OUT = 5.5 V, V_IN = 0 V, Measure I_VOUT		0.2	20	µA
UNDERVOLTAGE LOCKOUT
V_UVLO	Rising threshold	V_IN↑	3.5	3.77	4	V
	Hysteresis	V_IN↓		0.14		V
OUTPUT DISCHARGE
R_PD	Output pull-down resistance	V_IN = 4 V, V_OUT = 5 V, Disabled	350	545	1200	Ω
R_PD	Output pull-down resistance	V_IN = 5 V, V_OUT = 5 V, Disabled	300	456	800	Ω
THERMAL SHUTDOWN
T_SHDN	Rising threshold (T_J)	In current limit	135			°C
T_SHDN	Rising threshold (T_J)	Not in current limit	155			°C
	Hysteresis⁽³⁾			20		°C
ESD PROTECTION
I_I	Input leakage current (D1, D2)	V_I = 3.3 V		0.02	1	µA
V_D	Diode forward voltage (D1, D2); Lower clamp diode	I_O = 8 mA			0.95	V
V_BR	Breakdown voltage (D1, D2)	I_BR = 1 mA	6			V

(1) Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature

(2) See Current Limit section for explanation of this parameter.

(3) These parameters are provided for reference only, and do not constitute part of TI’s published device specifications for purposes of TI’s product warranty.