SLVSCR1C September   2015  – July 2017 TPS25810

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 USB Type C Basic
      2. 7.1.2 Configuration Channel
      3. 7.1.3 Detecting a Connection
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Configuration Channel Pins CC1 and CC2
      2. 7.3.2 Current Capability Advertisement and Overload Protection
      3. 7.3.3 Undervoltage Lockout (UVLO)
        1. 7.3.3.1  Device Power Pins (IN1, IN2, AUX, OUT, and GND)
        2. 7.3.3.2  FAULT Response
        3. 7.3.3.3  Thermal Shutdown
        4. 7.3.3.4  REF
        5. 7.3.3.5  Audio Accessory Detection
        6. 7.3.3.6  Debug Accessory Detection
        7. 7.3.3.7  Plug Polarity Detection
        8. 7.3.3.8  Device Enable Control
        9. 7.3.3.9  Load Detect
        10. 7.3.3.10 Power Wake
        11. 7.3.3.11 Port Power Management (PPM)
        12. 7.3.3.12 Implementing PPM in a System with Two Type-C Ports
        13. 7.3.3.13 PPM Operation
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Type C DFP Port Implementation without BC 1.2 Support
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Input and Output Capacitance
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Type-C DFP Port Implementation with BC 1.2 (DCP Mode) Support
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Detailed Description

7.1 Overview

The TPS25810 is a highly integrated USB Type-C Downstream Facing Port (DFP) controller with built-in power switch developed for the new USB Type-C connector and cable. The part provides all functionality needed to support a USB Type C DFP in a system where USB power delivery (PD) source capabilities (for example, VBUS > 5 V) are not implemented. The device is designed to be compliant to Type-C spec revision 1.2.

7.1.1 USB Type C Basic

For a detailed description of the Type-C spec refer to the USB-IF website to download the latest released version. Some of the basic concepts of the Type-C spec that pertains to understanding the operation of the TPS25810 (a DFP device) are described as follows.

USB Type-C removes the need for different plug and receptacle types for host and device functionality. The Type-C receptacle replaces both Type-A and Type-B receptacle since the Type-C cable is plug-able in either direction between host and device. A host-to-device logical relationship is maintained via the configuration channel (CC). Optionally hosts and devices can be either providers or consumers of power when USB PD communication is used to swap roles.

All USB Type-C ports operate in one of below three data modes:

  • Host mode: the port can only be host (provider of power)
  • Device mode: the port can only be device (consumer of power)
  • Dual-Role mode: the port can be either host or device

Port types:

  • DFP (Downstream Facing Port): Host
  • UFP (Upstream Facing Port): Device
  • DRP (Dual-Role Port): Host or Device

Valid DFP-to-UFP connections:

  • Table 1 describes valid DFP-to-UFP connections
  • Host to Host or Device to Device have no functions

Table 1. DFP-to-UFP Connections

HOST-MODE PORT DEVICE-MODE PORT DUAL-ROLE PORT
Host-Mode Port No Function Works Works
Device-Mode Port Works No Function Works
Dual-Role Port Works Works Works(1)
(1) This may be automatic or manually driven.

7.1.2 Configuration Channel

The function of the configuration channel is to detect connections and configure the interface across the USB Type-C cables and connectors.

Functionally the Configuration Channel (CC) is used to serve the following purposes:

  • Detect connect to the USB ports
  • Resolve cable orientation and twist connections to establish USB data bus routing
  • Establish DFP and UFP roles between two connected ports
  • Discover and configure power: USB Type-C current modes or USB Power Delivery
  • Discovery and configure optional Alternate and Accessory modes
  • Enhances flexibility and ease of use

Typical flow of DFP to UFP configuration is shown in Figure 11:

TPS25810 typical_flow_lvscr1.png Figure 11. Flow of DFP to UFP Configuration

7.1.3 Detecting a Connection

DFPs and DRPs fulfill the role of detecting a valid connection over USB Type-C. Figure 12 shows a DFP to UFP connection made with Type C cable. As shown in Figure 12, the detection concept is based on being able to detect terminations in the product which has been attached. A pull-up and pull-down termination model is used. A pull-up termination can be replaced by a current source.

  • In the DFP-UFP connection the DFP monitors both CC pins for a voltage lower than the unterminated voltage.
  • An UFP advertises Rd on both its CC pins (CC1 and CC2).
  • A powered cable advertises Ra on only one of CC pins of the plug. Ra is used to inform the source to apply VCONN.
  • An analog audio device advertises Ra on both CC pins of the plug, which identifies it as an analog audio device. VCONN is not applied on either CC pin in this case.

TPS25810 detecting_connection_slvscr1.gif Figure 12. DFP-UFP Connection

7.2 Functional Block Diagram

TPS25810 fbd_slvscr1.gif

7.3 Feature Description

The TPS25810 is a DFP Type C port controller with integrated power switch for VCONN and VBUS. The TPS25810 does not support BC1.2 charging modes since it does not interact with USB D+/D- data lines. It can be used in conjunction with a BC 1.2 device like the TPS2514A, to support BC1.2 and Type C charging modes in a single Type C DFP port. See the TPS25810 EVM user's guide (SLVUAI0) and Application and Implementation section of this data sheet for more details. The TPS25810 can be used in a USB 2.0 only or USB 3.1 port implementation. When used in a USB 3.1 port, the TPS25810 can control an external super speed MUX to handle the Type C flippable feature.

7.3.1 Configuration Channel Pins CC1 and CC2

The TPS25810 has two pins, CC1 and CC2 that serve to detect an attachment to the port and resolve cable orientation. These pins are also used to establish current broadcast to a valid UFP, configure VCONN, and detect Debug or Audio Adapter Accessory attachment.

Table 2 lists TPS25810 response to various attachments to its port.

Table 2. TPS25810 Response

TPS25810 TYPE C PORT CC1 CC2 TPS25810 RESPONSE(1)
OUT VCONN
On CC1 or CC2		 POL UFP AUDIO DEBUG
Nothing Attached OPEN OPEN OPEN NO Hi-Z Hi-Z Hi-Z Hi-Z
UFP Connected Rd OPEN IN1 NO Hi-Z LOW Hi-Z Hi-Z
UFP Connected OPEN Rd IN1 NO LOW LOW Hi-Z Hi-Z
Powered Cable/No UFP Connected OPEN Ra OPEN NO Hi-Z Hi-Z Hi-Z Hi-Z
Powered Cable/No UFP Connected Ra OPEN OPEN NO Hi-Z Hi-Z Hi-Z Hi-Z
Powered Cable/UFP Connected Rd Ra IN1 CC2 Hi-Z LOW Hi-Z Hi-Z
Powered Cable/UFP Connected Ra Rd IN1 CC1 LOW LOW Hi-Z Hi-Z
Debug Accessory Connected Rd Rd OPEN NO Hi-Z Hi-Z Hi-Z LOW
Audio Adapter Accessory Connected Ra Ra OPEN NO Hi-Z Hi-Z LOW Hi-Z
(1) POL, UFP, AUDIO, and DEBUG are open drain outputs; pull high with 100 kΩ to AUX when used. Tie to GND or leave open when not used.

7.3.2 Current Capability Advertisement and Overload Protection

The TPS25810 supports all three Type-C current advertisements as defined by the USB Type C standard. Current broadcast to a connected UFP is controlled by the CHG and CHG_HI pins. For each broadcast level the device protects itself from a UFP that draws current in excess of the port’s USB Type-C Current advertisement by setting the current limit as shown in Table 3.

Table 3. USB Type-C Current Advertisement

CHG CHG_HI CC CAPABILITY BROADCAST CURRENT LIMIT (typ) LOAD DETECT THRESHOLD (typ)
0 0 STD 1.7 A NA
0 1 STD 1.7 A NA
1 0 1.5 A 1.7 A NA
1 1 3 A 3.4 A 1.95 A

Under overload conditions, the internal current-limit regulator limits the output current to selected ILIM for OUT and fixed internal VCONN current limit as shown in the Electrical Characteristics. When an overload condition is present, the device maintains a constant output current, with the output voltage determined by (iOS x RLOAD). Two possible overload conditions can occur. The first overload condition occurs when either: 1) input voltage is first applied, enable is true, and a short circuit is present (load which draws IOUT > iOS), or 2) input voltage is present and the TPS25810 is enabled into a short circuit. The output voltage is held near zero potential with respect to ground and the TPS25810 ramps the output current to iOS. The TPS25810 limits the current to iOS until the overload condition is removed or the device begins to thermal cycle. This is demonstrated in Figure 24 where the device was enabled into a short, and subsequently cycles current off and on as the thermal protection engages.

The second condition is when an overload occurs while the device is enabled and fully turned on. The device responds to the overload condition within time iOS (see Figure 1) when the specified overload (per Electrical Characteristics) is applied. The response speed and shape vary with the overload level, input circuit, and rate of application. The current-limit response varies between simply settling to iOS or turnoff and controlled return to iOS. Similar to the previous case, the TPS25810 limits the current to iOS until the overload condition is removed or the device begins to thermal cycle.

The TPS25810 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the above cases. This is due to the relatively large power dissipation [(VIN – VOUT) x iOS] driving the junction temperature up. The device turns off when the junction temperature exceeds 135°C (min) while in current limit. The device remains off until the junction temperature cools 20°C and then restarts. The TPS25810 current limit profile is shown in Figure 13.

TPS25810 slope_graph_slvscr1.gif Figure 13. Current Limit Profile

7.3.3 Undervoltage Lockout (UVLO)

The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on.

7.3.3.1 Device Power Pins (IN1, IN2, AUX, OUT, and GND)

The device has multiple input power pins; IN1, IN2 and AUX. IN1 is connected to OUT by the internal power FET and serves the supply for the Type-C charging current. IN2 is the supply for VCONN and ties directly between the VCONN power switch on its input and CC1 or CC2 on its output. AUX or auxiliary input supply provides power to the chip. Refer to Functional Block Diagram.

In the simplest implementation where multiple supplies are not available; IN1, IN2, and AUX can be tied together. However in mobile systems (battery powered) where system power savings is paramount, IN1 and IN2 can be powered by the high power DC-DC supply (>3-A capability) while AUX can be connected to the low power supply that typically powers the system uC when the system is in hibernate or sleep power state. Unlike IN1 and IN2, AUX can operate directly from a 3.3-V supply commonly used to power the uC when the system is put in low power mode. A ceramic bypass capacitor close to the device from IN/AUX to GND is recommended to alleviate bus transients.

The recommended operating voltage range for IN1/IN2 is 4.5 V to 5.5 V while AUX can be operated from 2.9 V to 5.5 V. However IN1, the high power supply, can operate up to 6.5 V. This higher input voltage affords a larger IR drop budget in systems where a long cable harness is used and results in high IR drops with 3-A charging current. Increasing IN1 beyond 5.5 V enables longer cable/board trace lengths between the device and Type C receptacle while meeting the USB spec for VBUS at connector ≥ 4.75 V.

Figure 14 illustrates the point. In this example IN1 is at 5 V which restricts the IR drop budget from DC-DC to connector to 250 mV.

TPS25810 total_IR_loss_budget_slvscr1.gif Figure 14. Total IR Loss Budget

7.3.3.2 FAULT Response

The FAULT pin is an open drain output that asserts (active low) when device OUT current exceeds its programmed value and the over temperature threshold is crossed (TTH_OTSD1). Refer to the Electrical Characteristics for over current and temperature values. The FAULT signal remains asserted until the fault condition is removed and the device resumes normal operation. The TPS25810 is designed to eliminate false overcurrent fault reporting by using an internal deglitch circuit.

Connect FAULT with a pull-up resistor to AUX. FAULT can be left open or tied to GND when not used.

7.3.3.3 Thermal Shutdown

The device has two internal over temperature shutdown thresholds, TTH_OTSD1 and TTH_OTSD2, to protect the internal FET from damage and overall safety of the system. TTH_OTSD2 > TTH_OTSD1. FAULT is asserted low to signal a fault condition when device temperature exceeds TTH_OTSD1 and the current limit switch is disabled. However when TTH_OTSD2 is exceeded all open drain outputs are left open and the device is disabled such that minimum power/heat is dissipated. The device attempts to power-up when die temperature decreases by 20°C.

7.3.3.4 REF

A 100-kΩ (1% or better recommended) resistor is connected from this pin to REF_RTN. This pin sets the reference current required to bias the internal circuitry of the device. The overload current limit tolerance and CC currents depend upon the accuracy of this resistor, using a ±1% low tempco resistor, or better, yields the best current limit accuracy and overall device performance.

7.3.3.5 Audio Accessory Detection

The USB Type-C spec defines an audio adapter decode state which allows implementation of an analog USB Type-C to 3.5-mm headset adapter. The TPS25810 detects an audio accessory device when both CC1 and CC2 pins sees VRa voltage (when pulled to ground by Ra resistor). The device asserts the open drain AUDIO pin low to indicate the detection of such a device.

Table 4. Audio Accessory Detection

CC1 CC2 AUDIO STATE
Ra Ra Asserted (pulled low) Audio Adapter Accessory Connected

Platforms supporting this extension can trigger off of the AUDIO pin to enable accessory mode circuits to support the audio function. When the Ra pull-down is removed from the CC2 pin, AUDIO is de-asserted or pulled high. The TPS25810 monitors the CC2 pin for audio device detach. When this function is not needed (for example in a data-less port) AUDIO can be tied to GND or left open.

7.3.3.6 Debug Accessory Detection

The Type-C spec supports an optional Debug Accessory mode used for debug only and must not be used for communicating with commercial products. When the TPS25810 detects VRd voltage on both CC1 and CC2 pins (when pulled to ground by an Rd resistor), it asserts DEBUG low. With DEBUG is asserted, the system can enter debug mode for factory testing or a similar functional mode. DEBUG de-asserts or pulls high when Rd is removed from CC1. The TPS25810 monitors the CC1 pin for Debug Accessory detach.

If Debug accessory mode is not used, tie DEBUG to GND or leave it open.

Table 5. Debug Accessory Detection

CC1 CC2 POL STATE
Rd Rd Asserted (pulled low) Debug Accessory Mode connected

7.3.3.7 Plug Polarity Detection

Reversible Type-C plug orientation is reported by the POL pin when a UFP is connected. However when no UFP is attached, POL remains de-asserted irrespective of cable plug orientation. Table 6 describes the POL state based on which device CC pin detects VRD from an attached UFP pull-down.

Table 6. Plug Polarity Detection

CC1 CC2 POL STATE
Rd Open Hi-z UFP connected
Open Rd Asserted (pulled low) UFP connected with reverse plug orientation

Figure 15 shows an example implementation which utilizes the POL terminal to control the SEL terminal on the HD3SS3212. The HD3SS3212 provides switching on the differential channels between Port B and Port C to Port A depending on cable orientation.

TPS25810 plug_pol_det_slvscr1.gif Figure 15. Example Implementation

7.3.3.8 Device Enable Control

The logic enable pin controls the power switch and device supply current. The supply current is reduced to less than 1 μA when a logic low is present on EN. The EN pin provides a convenient way to turn on or turn off the device while it is powered. The enable input threshold has hysteresis built-in. When this pin is pulled high, the device is turned on or enabled. When the device is disabled (EN pulled low) the internal FETs tied to IN1 and IN2 are disconnected, all open drain outputs are left open (Hi-Z), and the CC1/CC2 monitor block is turned off. The EN terminal should not be left floating.

7.3.3.9 Load Detect

The load detect function in the device is enabled when it is set to broadcast high current VBUS charging (CHG = CHG_HI = High) on the CC pin. In this mode the device monitors the current to a UFP; if the current exceeds 1.95 A (TYP) the LD_DET pin asserts. Since LD_DET is an open drain output, pull it high with 100 kΩ to AUX when used; tie it to GND or leave open when not used.

7.3.3.10 Power Wake

The power wake feature supported in the TPS25810 offers the mobile systems designer a way to save on system power when no UFP is attached to the Type-C port. Refer to Figure 16. To enable power wake the UFP from device #1 and #2 are tied together (each with its own 100-kΩ pull-up) to the enable pin of a 5 V/6 A dc-dc buck converter. When no UFP is detected on both Type-C ports, the EN pin of the dc-dc is pulled high thereby disabling it. Since both TPS25810s are powered by an always-on 3.3-V LDO, turning off the IN1/IN2 supply does not affect its operation in detach state. Anytime a UFP is detected on either port, the corresponding TPS25810 UFP pin is pulled low enabling the dc-dc to provide charging current to the attached UFP. Turning off the high power dc-dc when ports are unattached saves on system power. This method can save a significant amount of power considering the TPS25810 only requires < 5 µA when no UFP device is connected.

TPS25810 power_wake_slvscr1.gif Figure 16. Power Wake Implementation

7.3.3.11 Port Power Management (PPM)

PPM is the intelligent and dynamic allocation of power made possible with the use of the LD_DET pin. It is for systems that have multiple charging ports but cannot power them all at their maximum charging current simultaneously.

Goals of PPM are:

  1. Enhances user experience since user does not have to search for high current charging port.
  2. Lowered cost and size of power supply needed for implementing high current charging in a multi-port system.

7.3.3.12 Implementing PPM in a System with Two Type-C Ports

Figure 17 shows PPM and power wake implemented in a system with two Type C ports both initially set to broadcast high current charging (3 A, CHG and CHG_HI pulled high via a 100 kΩ to AUX). To enable PPM tie the LD_DET pin from TPS25810 #1 to CHG_HI of TPS25810 #2 and vice versa as shown in Figure 17. Each device independently monitors charging current drawn by its attached UFP.

IN1, IN2 are connected to a TPS54620; a 6-A synchronous step-down converter. AUX is powered by a LP2950-33; a low quiescent current 3.3-V LDO. With no UFP attached to either Type C port the TPS25810 is powered by the LP2950-33. This method saves a significant amount of power considering the TPS25810 requires less than 2 µA when no USB device is connected.

TPS25810 power_wake_implemented_slvscr1.gif Figure 17. PPM and Power Wake Implemented

7.3.3.13 PPM Operation

When no UFP is attached, or either of the two attached UFP is drawing current less than the LD_DET threshold (1.95 A typical), the LD_DET output for both devices is high (shown in blue in Figure 18). Now when a UFP is attached to device #1 that draws a charging current higher than the LD_DET threshold (1.95 A), this causes LD_DET to assert or pull-low (shown in red in Figure 18). Since the LD-DET pins of the #1 and #2 devices are connected to the other devices CHG_HI pin, a high current detection on device #1 forces device #2 to broadcast 1.5 A or medium charging current capability on its CC pin. The Type C specification requires a UFP to monitor the CC pins continuously and adjust its current consumption (within 60 ms) to remain within the value advertised by the DFP.

Figure 19 shows the case when a UFP attached to Device 1 reduces its charging current below the LD_DET threshold, which causes LD-DET to de-assert, thereby toggling device #2 CH_HI pin from low to high.

This scheme:

  • Delivers a better user experience as the user does not have to worry about the maximum charging current rating of the host ports, both ports initially advertise high current charging.
  • Enables a smaller and lower cost power supply as the loading is controlled and never allowed to exceed 5 A.

TPS25810 USB_connected1_slvscr1.gif Figure 18. 3-A USB Device Connected
TPS25810 USB_connected2_slvscr1.gif Figure 19. 1.5-A USB Device Connected

7.4 Device Functional Modes

The TPS25810 is a Type-C controller with integrated power switch that supports all Type-C functions in a downstream facing port. It is also used to manage current advertisement and protection to a connected UFP and active cable. The device starts its operation by monitoring the AUX bus. When VAUX exceeds the under voltage-lockout threshold, the device samples the EN pin. A high level on this pin enables the device and normal operation begins. Having successfully completed its start-up sequence, the device now actively monitors its CC1 and CC2 pins for attachment to a UFP. When a UFP is detected on either the CC1 or CC2 pin the internal MOSFET starts to turn-on after the required de-bounce time is met. The internal MOSFET starts conducting and allows current to flow from IN1 to OUT. If Ra is detected on the other CC pin (not connected to UFP), VCONN is applied to allow current to flow from IN2 to the CC pin connected to Ra. For a complete listing of various device operational modes refer to Table 2.