SLVSCE9D June   2014  – October  2017 TPS25942A , TPS25942L , TPS25944A , TPS25944L

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Enable and Adjusting Undervoltage Lockout
      2. 9.3.2  Overvoltage Protection (OVP)
      3. 9.3.3  Hot Plug-In and In-Rush Current Control
      4. 9.3.4  Overload and Short Circuit Protection
        1. 9.3.4.1 Overload Protection
        2. 9.3.4.2 Short Circuit Protection
        3. 9.3.4.3 Start-Up With Short on Output
        4. 9.3.4.4 Constant Current Limit Behavior During Overcurrent Faults
      5. 9.3.5  Reverse Current Protection
      6. 9.3.6  FAULT Response
      7. 9.3.7  Current Monitoring
      8. 9.3.8  Power Good Comparator
      9. 9.3.9  IN, OUT and GND Pins
      10. 9.3.10 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Diode Mode
      2. 9.4.2 Shutdown Control
      3. 9.4.3 Operational Differences Between the TPS25942 and TPS25944
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Step by Step Design Procedure
        2. 10.2.2.2 Programming the Current-Limit Threshold: R(ILIM) Selection
        3. 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
        4. 10.2.2.4 Programming Current Monitoring Resistor—RIMON
        5. 10.2.2.5 Setting Output Voltage Ramp Time (tdVdT)
          1. 10.2.2.5.1 Case1: Start-Up Without Load: Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. 10.2.2.5.2 Case 2: Start-Up With Load: Output Capacitance C(OUT) and Load Draws Current During Start-Up
        6. 10.2.2.6 Programing the Power Good Set Point
        7. 10.2.2.7 Support Component Selections—R6, R7 and CIN
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Active ORing (Auto-Power Multiplexer) Operation
        1. 10.3.1.1 N+1 Power Supply Operation
        2. 10.3.1.2 Priority Power MUX Operation
        3. 10.3.1.3 Priority MUXing With Almost Equal Rails (VIN1 ~ VIN2)
        4. 10.3.1.4 Reverse Polarity Protection
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
    2. 11.2 Output Short-Circuit Measurements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 Community Resources
    6. 13.6 Trademarks
    7. 13.7 Electrostatic Discharge Caution
    8. 13.8 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.7 Typical Characteristics

Conditions are –40°C ≤ TJ = TA ≤ +125°C, V(IN) = 12 V, V(EN/UVLO) = 2 V, V(OVP) = V(DMODE) = V(PGTH) = 0 V, R(ILIM) = 150 kΩ, C(OUT) = 1 µF, C(dVdT) = OPEN, PGOOD = FLT = IMON = OPEN. (unless stated otherwise)
TPS25942A TPS25942L TPS25944A TPS25944L C001_SLVSCE9.png
Figure 1. Internal UVLO Threshold Voltage vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L D003_SLVSCE9.gif
Figure 3. Input Supply Current vs Supply Voltage at Shutdown
TPS25942A TPS25942L TPS25944A TPS25944L C005_SLVSCE9.png
Figure 5. OVP Threshold Voltage vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C007_SLVSCE9.png
Figure 7. EN Threshold Voltage for Low IQ Mode vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C009_SLVSCE9.png
Figure 9. Enable Turnoff Delay vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L D204_SLVSCE9.gif
Figure 11. DMODE Threshold Voltage vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C013_SLVSCE9.png
Figure 13. GAIN(dVdT) vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C015_SLVSCE9.png
Figure 15. Current Limit vs Current Limit Resistor
TPS25942A TPS25942L TPS25944A TPS25944L D017_SLVSCE9.gif
Figure 17. Current Limit vs Temperature Across R(ILIM)
TPS25942A TPS25942L TPS25944A TPS25944L D030_SLVSCE9.gif
For I(LIM) = 5.3 A, device goes into thermal shutdown for
[V(IN) – V(OUT)] > 8 V
Figure 19. Current Limit Normalized (%) vs V(IN) – V(OUT)
TPS25942A TPS25942L TPS25944A TPS25944L C022_SLVSCE9.png
Figure 21. Fast Trip Threshold vs Current Limit
TPS25942A TPS25942L TPS25944A TPS25944L C023_SLVSCE9.png
Figure 23. GAIN(IMON) vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L D025_SLVSCE9.gif
Figure 25. RON vs Temperature Across Load Current
TPS25942A TPS25942L TPS25944A TPS25944L C102_SLVSCE9.png
Figure 27. V(REVTH) vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C104_SLVSCE9.png
Figure 29. Circuit Breaker Timer Fault Assertion Delay vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L 1_TurnON_EN_4.5V Cdvdt0nF.png
V(IN) = 4.5 V
Figure 31. Turnon With Enable
TPS25942A TPS25942L TPS25944A TPS25944L 3_EN_Ramp_11OhmLoad_11VV_TON(dly).png
R(FLT) = 100 kΩ
Figure 33. EN Turnon Delay : EN ↑ to Output Ramp ↑
TPS25942A TPS25942L TPS25944A TPS25944L 5_OVP_11Ohm_Load_TOVPR(dly).png
V(IN) = 12 V RL = 12 Ω R(FLT) = 100 kΩ
Figure 35. OVP Turnoff Delay: OVP ↑ to Fault ↓
TPS25942A TPS25942L TPS25944A TPS25944L 7_Power Good Deglitch_Raising.png
V(IN) = 12 V RL = 12 Ω R(FLT) = 100 kΩ
R(PGOOD) = 100 kΩ
Figure 37. Power Good Delay (Rising)
TPS25942A TPS25942L TPS25944A TPS25944L 9_Hot_Short_Fasttrip_response_Current_Regulation.png
V(IN) = 12 V R(IMON) = 16.9 kΩ R(FLT) = 100 kΩ
R(ILIM) = 17.8 KΩ
Figure 39. Hot-Short: Fast Trip Response and Current Regulation
TPS25942A TPS25942L TPS25944A TPS25944L 11_ENLBLK-21OhmLoad_12V_Blocing FET disable(dly).png
Figure 41. Transition from Normal Mode to Non-Ideal Diode Mode
TPS25942A TPS25942L TPS25944A TPS25944L figure44_slvsce9.png
V(IN) = 12 V RL = 3 Ω to 2 Ω R(IMON) = 16.9 kΩ
R(ILIM) = 17.8 KΩ R(FLT) = 100 kΩ
Figure 43. Overload: TPS25944A Circuit Break Function
TPS25942A TPS25942L TPS25944A TPS25944L figure46_slvsce9.png
V(IN) = 5 V R(IMON) = 16.9 kΩ R(FLT) = 100 kΩ
R(ILIM) = 17.8 KΩ
Figure 45. Hot Short Response: TPS25944A
Device Turns Off after the Fault Timer tCB(dly) (4 ms) Expires
TPS25942A TPS25942L TPS25944A TPS25944L D002_SLVSCE9.gif
Figure 2. Input Supply Current vs Supply Voltage During Normal Operation
TPS25942A TPS25942L TPS25944A TPS25944L C004_SLVSCE9.png
Figure 4. EN Threshold Voltage vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C006_SLVSCE9.png
Figure 6. PGTH Threshold Voltage vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C008_SLVSCE9.png
Figure 8. Enable Turnon Delay vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C100_SLVSCE9.png
Figure 10. OVP Disable Delay vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L D203_SLVSCE9.gif
Figure 12. DMODE Pulldown Current vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C014_SLVSCE9.png
Figure 14. Output Ramp Time vs C(dVdT)
TPS25942A TPS25942L TPS25944A TPS25944L C016_SLVSCE9.png
Figure 16. Current Limit Accuracy vs Current Limit
TPS25942A TPS25942L TPS25944A TPS25944L D018_SLVSCE9.gif
Figure 18. Current Limit (% Normalized) vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C019_SLVSCE9.png
Figure 20. Current Limit for R(ILIM) = Open and Short vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L D022_SLVSCE9.gif
Figure 22. IMON Offset vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C024_SLVSCE9.png
Figure 24. Current Monitor Output vs Output Current
TPS25942A TPS25942L TPS25944A TPS25944L C026_SLVSCE9.png
Figure 26. OUT Leakage Current in Off State vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C103_SLVSCE9.png
Figure 28. V(FWDTH) vs Temperature
TPS25942A TPS25942L TPS25944A TPS25944L C029_SLVSCE9.png
Taken on 2-Layer board, 2oz.(0.08-mm thick) with GND plane area: 14 cm2 (Top) and 20 cm2 (Bottom)
Figure 30. Thermal Shutdown Time vs Power Dissipation
TPS25942A TPS25942L TPS25944A TPS25944L 2_EN_Ramp_11OhmLoad_11V_IIN.png
V(IN) = 11 V
Figure 32. Turnon and Turnoff With Enable
TPS25942A TPS25942L TPS25944A TPS25944L 4_EN_Ramp_11OhmLoad_11V_TOFF(dly).png
R(FLT) = 100 kΩ
Figure 34. EN Turnoff Delay : EN ↓ to Fault ↓
TPS25942A TPS25942L TPS25944A TPS25944L 6_OVP_11Ohm_Load_TOVPF(dly).png
V(IN) = 12 V RL = 12 Ω R(FLT) = 100 kΩ
Figure 36. OVP Turnon Delay: OVP ↓ to Output Ramp ↑
TPS25942A TPS25942L TPS25944A TPS25944L 8_Power Good Deglitch_Falling.png
V(IN) = 12 V RL = 12 Ω R(FLT) = 100 kΩ
R(PGOOD) = 100 kΩ
Figure 38. Power Good Delay (Falling)
TPS25942A TPS25942L TPS25944A TPS25944L 10_Hot_Short_Fasttrip_response_Zoomed.png
V(IN) = 12 V R(IMON) = 16.9 kΩ R(FLT) = 100 kΩ
R(ILIM) = 17.8 KΩ
Figure 40. Hot-Short: Fast Trip Response (Zoomed)
TPS25942A TPS25942L TPS25944A TPS25944L 12_ENLBLK-21OhmLoad_12V_tENBLKON(dly).png
Figure 42. Transition from Non-Ideal Diode Mode to Normal Mode
TPS25942A TPS25942L TPS25944A TPS25944L figure45_slvsce9.png
Figure 44. Overload: Zoomed In (First Cycle)
TPS25942A TPS25942L TPS25944A TPS25944L figure47_slvsce9.png
V(IN) = 12 V R(IMON) = 16.9 kΩ R(FLT) = 100 kΩ
R(ILIM) = 17.8 KΩ
Figure 46. Hot Short Response: TPS25944A
Device Turns Off When TJ > T(TSD) Before Timer Expires