SLVSGG3A May   2022  – September 2022 TPS25985

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Logic Interface
    7. 7.7 Timing Requirements
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Undervoltage Protection
      2. 8.3.2  Insertion Delay
      3. 8.3.3  Overvoltage Protection
      4. 8.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 8.3.4.1 Slew rate (dVdt) and Inrush Current Control
          1. 8.3.4.1.1 Start-Up Time Out
        2. 8.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 8.3.4.3 Active Current Limiting During Start-Up
        4. 8.3.4.4 Short-Circuit Protection
      5. 8.3.5  Analog Load Current Monitor (IMON)
      6. 8.3.6  Mode Selection (MODE)
      7. 8.3.7  Parallel Device Synchronization (SWEN)
      8. 8.3.8  Stacking Multiple eFuses for Unlimited Scalability
        1. 8.3.8.1 Current Balancing During Start-Up
      9. 8.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 8.3.10 Overtemperature Protection
      11. 8.3.11 Fault Response and Indication (FLT)
      12. 8.3.12 Power Good Indication (PG)
      13. 8.3.13 Output Discharge
      14. 8.3.14 General Purpose Comparator
      15. 8.3.15 FET Health Monitoring
      16. 8.3.16 Single Point Failure Mitigation
        1. 8.3.16.1 IMON Pin Single Point Failure
        2. 8.3.16.2 ILIM Pin Single Point Failure
        3. 8.3.16.3 IREF Pin Single Point Failure
        4. 8.3.16.4 ITIMER Pin Single Point Failure
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Single Device, Standalone Operation
      2. 9.1.2 Multiple Devices, Parallel Connection
    2. 9.2 Typical Application: 12-V, 3.6-kW Power Path Protection in Datacenter Servers
      1. 9.2.1 Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Performance Plots
    3. 9.3 Multiple eFuses, Parallel Connection with PMBus
    4. 9.4 Digital Telemetry Using External Microcontroller
    5. 9.5 What to Do and What Not to Do
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

(Test conditions unless otherwise noted) –40°C ≤ TJ ≤ 125°C, VIN = 12 V, VDD = 12 V, OUT = Open, VEN/UVLO = 2 V, SWEN = 10 kΩ pull-up to 5 V, RILIM = 550 Ω, RIMON = 1100 Ω, VIREF = 1 V, DVDT = Open, ITIMER = Open, FLT = 10 kΩ pull-up to 5 V, PG = 10 kΩ pull-up to 5 V, TEMP = Open, MODE = Open, CMPM = Open, CMPP = Open, CMPOUT = Open. All voltages referenced to GND. 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT SUPPLY (VDD)
VDD VDD input operating voltage range 4.5 16 V
IQON(VDD) VDD ON state quiescent current VVDD > VUVP(R), VEN ≥ VUVLO(R) 0.45 0.55 mA
IQOFF(VDD) VDD OFF state current  VEN < VUVLO(F) 82 240 µA
VUVP(R) VDD undervoltage protection threshold VDD Rising 4.03 4.21 4.38 V
VUVP(F) VDD undervoltage protection threshold VDD Falling 3.8 4.05 4.24 V
INPUT SUPPLY (IN)
VIN VIN input operating voltage range 4.5 16 V
VUVPIN(R) VIN undervoltage protection threshold VIN Rising 4 4.23 4.5 V
VUVPIN(F) VIN undervoltage protection threshold VIN Falling 3.9 4.08 4.4 V
IQON(IN) IN ON state quiescent current VEN ≥ VUVLO(R) 2.83 4.7 mA
IQOFF(IN) IN OFF state current   VEN < VUVLO(F) 2.9 400 µA
ENABLE / UNDERVOLTAGE LOCKOUT (EN/UVLO)
VUVLO(R) EN/UVLO pin voltage rising threshold for turning on EN/UVLO  Rising 1.12 1.2 1.28 V
VUVLO(F) EN/UVLO pin voltage falling threshold for turning off and engaging output discharge (primary device) EN/UVLO Falling, MODE = Open 1.02 1.09 1.18 V
EN/UVLO pin voltage threshold for turning off and engaging QOD (secondary device) EN/UVLO Falling, MODE = GND 0.92 0.99 1.08 V
VSD(F) EN/UVLO pin voltage threshold for entering full shutdown EN/UVLO Falling 0.5 0.8 V
IENLKG EN/UVLO pin leakage current VEN < Min(VIN + 1 V, VDD + 1 V) –0.1 0.1
µA
OVERVOLTAGE PROTECTION (IN)
VOVP(R) Input overvoltage protection threshold (rising) VIN rising 15.7 16.6 17.9 V
VOVP(F) Input overvoltage protection threshold (falling) VIN falling 15.4 16.44 17.8 V
ON-RESISTANCE (IN - OUT)
RON ON resistance IOUT = 8 A, TJ = 25℃ 0.582 0.737 mΩ
IOUT = 8 A, TJ = -40 to 125℃ 1 mΩ
OVERCURRENT PROTECTION REFERENCE (IREF)
IIREF IREF pin internal sourcing current 24.3 24.98 25.7
µA
CURRENT LIMIT (ILIM)
GILIM(LIN) ILIM current monitor gain (ILIM:IOUT) 17.62 18.18 18.74 µA/A
CLREF(SAT)% Ratio of start-up current limit threshold (ILIM) to steady-state overcurrent protection threshold reference (IREF) VOUT > VFB, PG not asserted 17 22 29 %
ILIM Start-up current limit regulation threshold  RILIM = 138 Ω, VIREF = 1.2 V, VOUT > VFB 28.4 39.51 52.8 A
RILIM = 160 Ω, VIREF = 1..2 V, VOUT > VFB 26.5 34.66 45 A
RILIM = 400 Ω, VIREF = 1.2 V, VOUT > VFB 8 13.65 18.2 A
RILIM = 800 Ω, VIREF = 1.2 V, VOUT > VFB 5.7 9.73 13 A
VFB Foldback voltage 1.5 1.99 2.5 V
OUTPUT CURRENT MONITOR AND OVERCURRENT PROTECTION (IMON)
GIMON IMON current monitor gain (IMON:IOUT) Device in steady state (PG asserted) 17.808 18.19 18.57 µA/A
IOCP Steady-state overcurrent protection (Circuit-Breaker) threshold RIMON = 1100 Ω, VIREF = 1.2 V 58.04 60.11 61.96 A
RIMON = 1100 Ω, VIREF = 1V 48.3 50.1 51.7 A
RIMON = 1100 Ω, VIREF = 0.5 V 24.1 25.09 25.9 A
RIMON = 1100 Ω, VIREF = 0.24 V 11.35 12.05 12.65 A
TRANSIENT OVERCURRENT BLANKING TIMER (ITIMER)
IITIMER ITIMER pin internal discharge current IOUT > IOCP, ITIMER ↓ 1.29 2.07 2.98
µA
RITIMER ITIMER pin internal pull-up resistance 10 13.87 19 kΩ
VINT ITIMER pin internal pull-up voltage IOUT < IOCP 3 3.65 4.1 V
VITIMERTHR ITIMER comparator falling threshold IOUT > IOCP, ITIMER ↓ 2.16 V
ΔVITIMER ITIMER discharge voltage threshold IOUT > IOCP, ITIMER ↓ 1.24 1.50 1.76 V
SHORT-CIRCUIT PROTECTION
IFFT Fixed fast-trip threshold in steady-state PG asserted High, Standalone/Primary mode, MODE = Open 99 148 210 A
PG asserted High, Secondary mode, MODE = GND 130 222 290 A
SFTREF(LIN)% Scalable fast-trip threshold (IMON) to overcurrent protection threshold reference (IREF) ratio during steady-state Standalone/Primary mode, MODE = Open 186 200 214 %
Secondary mode, MODE = GND 210 225 240 %
SFTREF(SAT)% Scalable fast trip threshold to start-up current limit threshold ratio (ILIM) (Inrush) Standalone/Primary mode, MODE = Open 34 50 66 %
Secondary mode, MODE = GND 34 50 66 %
RON(ACS) Maximum RON during steady-state active current sharing VILIM > CLREF(ACS)% × VIREF 0.778 1.31 mΩ
GIMON(ACS) IMON:IOUT ratio during active current sharing PG asserted High,  VILIM > CLREF(ACS)% × VIREF 18.02 18.39 18.87 µA/A
CLREF(ACS)% Ratio of active current sharing trigger threshold to steady state overcurrent protection threshold PG asserted High 34.67 36.67 38.67 %
INRUSH CURRENT PROTECTION (DVDT)
IDVDT DVDT pin charging current Primary/Standalone mode, MODE = Open 1.4 2.03 2.9
µA
GDVDT DVDT gain 18 20.5 22 V/V
RDVDT dVdt pin to GND discharge resistance 350 529.6 670 Ω
RON(GHI) RON when PG is asserted 0.749 1.31 mΩ
COMPARATOR INPUTS (CMPP, CMPM)
VCM(CMP) CMPx common mode voltage range 0.3 1.5
ICMPx CMPx pin leakage current 0.3 V < VCMPx < 1.5 V –0.1 0.1
µA
QUICK OUTPUT DISCHARGE (QOD)
IQOD Quick output discharge internal pull-down current VSD(F) < VEN < VUVLO(F), –40 < TJ < 125℃ 11.6 20.65 26.5 mA
TEMPERATURE SENSOR OUTPUT (TEMP)
GTMP TEMP sensor gain 2.58 2.65 2.72 mV/℃
VTMP TEMP pin output voltage TJ = 25℃ 672 678.5 685 mV
ITMPSRC TEMP pin sourcing current 75 93.4 170 µA
ITMPSNK TEMP pin sinking current 8 10.1 14 µA
OVERTEMPERATURE PROTECTION (OTP)
TSD Thermal shutdown threshold TJ Rising 150 °C
TSDHYS Thermal shutdown hysteresis TJ Falling 12.5 °C
FET HEALTH MONITOR
VDSFLT FET D-S fault threshold SWEN = L 0.38 0.49 0.59 V
SINGLE POINT FAILURE (ILIM, IMON, IREF, ITIMER)
IOC_BKP(LIN) Back-up overcurrent protection threshold (steady -state) 70 94.2 140 A
IOC_BKP(SAT) Back-up overcurrent protection threshold (start-up) 50 102.2 160 A