SLVSGF0A october   2022  – june 2023 TPS3435-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Timing Diagrams
    9. 7.9 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Timeout Watchdog Timer
        1. 8.3.1.1 tWD Timer
        2. 8.3.1.2 Watchdog Enable Disable Operation
        3. 8.3.1.3 tSD Watchdog Start Up Delay
        4. 8.3.1.4 SET Pin Behavior
      2. 8.3.2 Manual RESET
      3. 8.3.3 WDO Output
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Assert Delay
        1. 9.1.1.1 Factory-Programmed Output Assert Delay Timing
        2. 9.1.1.2 Adjustable Capacitor Timing
      2. 9.1.2 Watchdog Timer Functionality
        1. 9.1.2.1 Factory-Programmed Timing Options
        2. 9.1.2.2 Adjustable Capacitor Timing
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1: Monitoring a Standard Microcontroller for Timeouts
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Setting the Watchdog Timeout Period
          2. 9.2.1.2.2 Setting Output Assert Delay
          3. 9.2.1.2.3 Setting the Startup Delay
          4. 9.2.1.2.4 Calculating the WDO Pullup Resistor
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.2 Manual RESET

The TPS3435-Q1 supports manual reset functionality using MR pin. MR pin when driven with voltage lower than 0.3 x VDD, asserts the WDO output. The MR pin has 100 kΩ pull up to VDD. The MR pin can be left floating. The internal pull up makes sure the output is not asserted due to MR pin trigger.

The output is deasserted after MR pin voltage rises above 0.7 x VDD voltage. Refer Figure 8-10 for more details.

GUID-20220928-SS0I-TT1F-MN7J-X29MVJSM7P1V-low.svg Figure 8-10 MR Pin Response